Open Quuxplusone opened 12 years ago
Bugzilla Link | PR12102 |
Status | NEW |
Importance | P normal |
Reported by | Ben Panning (benjamin.j.panning@intel.com) |
Reported on | 2012-02-27 14:08:48 -0800 |
Last modified on | 2017-05-01 10:32:20 -0700 |
Version | 3.0 |
Hardware | PC All |
CC | anton@korobeynikov.info, flash@pobox.com, llvm-bugs@lists.llvm.org, wendling@apple.com |
Fixed by commit(s) | |
Attachments | |
Blocks | |
Blocked by | |
See also |
Intel asm printer is of 'listing' quality. It should not be used to produce anything which can be assembled back.
Devang would normally have picked this up since he was pushing the intel printer forward, but he isn't working on llvm anymore.
This issue appears to impact all short form move instructions that encode destination register as EAX within the opcode.
Looking at the x86InstrInfo.td file, it appears that the encoding of these instructions is incorrect. The addressing mode is described as being PC-relative, but that addressing mode is invalid in protected mode (32-bit). PC relative addressing is only valid within long-mode (64-bit).
I'm unsure if this encoding is to blame or whether the special short-form move simplification within X86MCInstLower::Lower() is to blame.
For now, I've worked around this issue in our tool-chain by removing the short-form move instructions from the instruction set. If I have time, I will try to provide a real fix for this issue (granted, I'm not very familiar with TableGen and the X86 back-end, so it may take some time...).