At the moment, the LLVM memory model specification allows for tearing. This is correct for mixed-size or unaligned access, for example if mutexes are used for large accesses, and atomic instructions are used for small accesses. Unfortunately, the spec as it currently stands allows for tearing even when the accesses are all of the same size.
Adding a new sentence to the specification would fix this, something like "If an atomic read R can only see atomic writes to the same address range, then there must be a single write W such that each R_byte in R chooses a W_byte from W."
At the moment, the LLVM memory model specification allows for tearing. This is correct for mixed-size or unaligned access, for example if mutexes are used for large accesses, and atomic instructions are used for small accesses. Unfortunately, the spec as it currently stands allows for tearing even when the accesses are all of the same size.
The problem is that in http://llvm.org/docs/LangRef.html#memory-model-for-concurrent-operations, there is no guarantee that each of the W_byte operations observed by one R come from the same W, even when all accesses are to the same address range.
Adding a new sentence to the specification would fix this, something like "If an atomic read R can only see atomic writes to the same address range, then there must be a single write W such that each R_byte in R chooses a W_byte from W."