[META][X86] Avoid lowering C intrinsics calls to target-specific LLVM IR intrinsics

[Quuxplusone]

Bugzilla Link	PR30624
Status	NEW
Importance	P normal
Reported by	Zvi Rackover (zvirack@gmail.com)
Reported on	2016-10-06 09:48:10 -0700
Last modified on	2020-12-14 04:30:25 -0800
Version	trunk
Hardware	PC All
CC	boaz.ouriel@intel.com, craig.topper@gmail.com, david.l.kreitzer@intel.com, igor.breger@intel.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, michael.zuckerman@intel.com, spatel+llvm@rotateright.com
Fixed by commit(s)
Attachments	x86-intrinsics.csv (121737 bytes, application/vnd.ms-excel)
Blocks
Blocked by	PR11025, PR26859, PR27340, PR28001, PR30561, PR30563, PR30633, PR30985, PR31712, PR33584, PR37554, PR39927, PR40019, PR40056, PR40258, PR40259, PR46851
See also	PR31446, PR11210, PR11025

Created attachment 17408
List of C intrinsics that are lowered to llvm.x86.* LLVM IR intrinsics

This bug is for tracking the effort of lowering all X86 C intrinsics to target-
independent LLVM IR, for all cases that it can be done reasonably.

The attached CSV file was created by Ayman Musa. It should contain a list of
all intrinsics which are lowered to calls to llvm.x86.* intrinsics.
The list was created by parsing the Clang tests.

All intrinsics that cannot be lowered to a reasonable LLVM-IR code such that
the semantics of the original function are easy to identify at Isel, are marked
as so.

Of the 3142 intrinsics functions that appear in the CSV:
- 139 were identified as *can* be lowered to target-independent IR
- 55 were identified as *cannot* be lowered to target-independent IR
- 2948 are TBD. (Yes, lots of more work ahead of us).

[Quuxplusone]

Attached x86-intrinsics.csv (121737 bytes, application/vnd.ms-excel): ``` List of C intrinsics that are lowered to llvm.x86.* LLVM IR intrinsics

[Quuxplusone]

Nice! I think it'd be useful to split the 'Can lower to IR' into several
subtypes:

1 - replace with generic IR in headers
2 - replace with generic IR in clang frontend
3 - replace with generic llvm intrinsic
4 - available as x86 ISD opcode

It should be noted that there are ops that need extra handling:
e.g NAN handling for maxps is different from llvm.maxnum
e.g out of range shift values for PSRA/PSRL/PSLL etc.

[Quuxplusone]

This is great. To paraphrase a blurb from https://reviews.llvm.org/D24815 about
the general steps for converting these:

1. Prepare the backend (DAG) to handle the expected new IR patterns and add
tests for those.
2. Auto-upgrade the IR, remove deprecated handling of the old IR intrinsics,
and change/remove existing tests.
3. Update clang to not produce the deprecated intrinsics.

If someone is actively working on these, it would be great to have an annotated
list that shows what is underway at any given time so we don't have any
duplicated effort. Or just open a specific bug report for an intrinsic, assign
it to an engineer, and link that report to this master list?