[MIPS] Emitted instructions do not meet their predicates

[Quuxplusone]

Bugzilla Link	PR30714
Status	NEW
Importance	P normal
Reported by	Simon Dardis (simon.dardis@gmail.com)
Reported on	2016-10-17 04:15:09 -0700
Last modified on	2018-10-18 07:54:53 -0700
Version	trunk
Hardware	PC All
CC	lidija.besker@rt-rk.com, llvm-bugs@lists.llvm.org, simon.dardis@gmail.com, Vasileios.Kalintiris@imgtec.com
Fixed by commit(s)
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Blocked by
See also

Certain instructions can be emitted in cases where they do not meet their
predicates.

See: https://reviews.llvm.org/D25618 and https://reviews.llvm.org/D25622

Quoting D25622:

The following tests fail when this patch is applied.
Failing Tests (26):

LLVM :: CodeGen/Mips/cconv/callee-saved-float.ll
LLVM :: CodeGen/Mips/micromips-atomic1.ll
LLVM :: CodeGen/Mips/tailcall/tailcall-wrong-isa.ll
LLVM :: MC/Mips/cprestore-noreorder.s
LLVM :: MC/Mips/cprestore-reorder.s
LLVM :: MC/Mips/elf_eflags_mips16.s
LLVM :: MC/Mips/expansion-jal-sym-pic.s
LLVM :: MC/Mips/expr1.s
LLVM :: MC/Mips/micromips-16-bit-instructions.s
LLVM :: MC/Mips/micromips-alu-instructions.s
LLVM :: MC/Mips/micromips-branch-fixup.s
LLVM :: MC/Mips/micromips-branch-instructions.s
LLVM :: MC/Mips/micromips-control-instructions.s
LLVM :: MC/Mips/micromips-dsp/valid-micromips32r3.s
LLVM :: MC/Mips/micromips-el-fixup-data.s
LLVM :: MC/Mips/micromips-expansions.s
LLVM :: MC/Mips/micromips-fpu-instructions.s
LLVM :: MC/Mips/micromips-jump-instructions.s
LLVM :: MC/Mips/micromips-jump26.s
LLVM :: MC/Mips/micromips-tailr.s
LLVM :: MC/Mips/micromips/valid.s
LLVM :: MC/Mips/micromips32r6/valid.s
LLVM :: MC/Mips/mips2/valid.s
LLVM :: MC/Mips/mips3/valid.s
LLVM :: MC/Mips/mips4/valid.s
LLVM :: MC/Mips/mips5/valid.s

Some look like bugs but others look like they are deliberate (e.g.
SYNC is using a loophole to implement the MIPS-II version as an
alias of the MIPS32 version).

[Quuxplusone]

Sync fixed in r284483.

[Quuxplusone]

Looking through the failing tests points to mixed MIPS / (microMIPS | mips16e) triggering the test failures.

There's few places in the backend where we emit only standard MIPS. Some of the cases care cprestore expansion, nop insertion in the target streamer.

The some of the other tests are showing that the instructions in question are not covered by NotInMicroMips predicate.

Cases: sdbbp (no operand alias), cache, pref, ssnop, ehb, pause, break (no operand alias and one operand alias).

[Quuxplusone]

What is happening with this bug? Patch from D25622 needs update, as it is now it can not be applied.