Assertion `!empty() && "empty range"' failed.

[Quuxplusone]

Bugzilla Link	PR46154
Status	RESOLVED FIXED
Importance	P normal
Reported by	Jonas Paulsson (paulsson@linux.vnet.ibm.com)
Reported on	2020-06-01 04:39:52 -0700
Last modified on	2020-06-03 17:15:40 -0700
Version	trunk
Hardware	PC Linux
CC	kparzysz@quicinc.com, llvm-bugs@lists.llvm.org, paulsson@linux.vnet.ibm.com, quentin.colombet@gmail.com, uweigand@de.ibm.com
Fixed by commit(s)
Attachments	tc_notempty_emptyrange.ll (628 bytes, text/plain) regcoal.patch (1434 bytes, text/plain)
Blocks
Blocked by
See also

Created attachment 23558
reduced (very small) test case

llc -mtriple=s390x-linux-gnu -mcpu=z13 -O3 -pre-RA-sched=list-ilp -systemz-
subreg-liveness -stress-sched -terminal-rule tc_notempty_emptyrange.ll -o -

llc: /home/ijonpan/llvm-project/llvm/lib/CodeGen/LiveInterval.cpp:447: bool
llvm::LiveRange::overlaps(const llvm::LiveRange&, const llvm::CoalescerPair&,
const llvm::SlotIndexes&) const: Assertion `!empty() && "empty range"' failed.

...
#11 0x000002aa15de122e (anonymous namespace)::RAGreedy::tryAssign

[Quuxplusone]

Attached tc_notempty_emptyrange.ll (628 bytes, text/plain): reduced (very small) test case

[Quuxplusone]

The problematic interval is %4. Before coalescing it looks like this: %4 [80r,256r:0) 0@80r weight:0.000000e+00

After coalescing %4 has been promoted from a gpr32 to a gpr128 while merged with the various copy. Yet only the low 32-bit lane is used and the other lanes are empty: %4 [80r,256r:0) 0@80r L0000000000000007 EMPTY L0000000000000008 [80r,256r:0) 0@80r weight:0.000000e+00

The code looks like this after coalescing: 80B undef %4.subreg_l64:gr128bit = LGHI 0 <...> 256B STC %4.subreg_l32:gr128bit, %2:addr64bit, 19, $noreg :: (store 1 into i8* getelementptr inbounds ([7 x [10 x i8]], [7 x [10 x i8]]* @g_222, i64 0, i64 1, i64 9))

I would have expected %4 to define dead refs on 80B instead of keeping the lanes empty. So probably an issue with how we create the subranges when we do rematerialization here.

For the record the reason why the option -terminal-rule is needed is because otherwise %4 gets merged with %3 and the one that gets the dematerialization is %9 which is already a 128-bit value, so we don't create empty lanes when we rematerialize.

[Quuxplusone]

So probably an issue with how we create the subranges when we do rematerialization here.

I concur the code that updates the subranges when the definition has a subreg, only cleans up unused and not defined empty lanes but doesn't assign the proper dead def to the one that are unused but defined.

Attaching a tentative patch.

[Quuxplusone]

Attached regcoal.patch (1434 bytes, text/plain): Tentative patch

[Quuxplusone]

With the attached patch, %4 looks much more reasonable after coalescing:
%4 [80r,256r:0)  0@80r L0000000000000007 [80r,80d:0)  0@80r L0000000000000008
[80r,256r:0)  0@80r weight:0.000000e+00

[Quuxplusone]

Fixed in
https://github.com/llvm/llvm-project.git
   eb9ca9da3e9..ccb3c8e8613  master -> master