Open Quuxplusone opened 3 years ago
I'm pretty new to LLVM, and I'm trying to understand how mul x, 1111..
gets lowered to neg x
. I notice that even when I run llc with -fast-isel flag, it still goes through DAGCombine pass, which is the one responsible for lowering mul x, 1111..
to sub 0, x
. Shouldn't FastISel not go through DAGCombine?
As described in test/CodeGen/M68k/ASM/Arith/imul-neg.ll, when multiplying value
x
with 2^n - 1 integer, the result will be-x
, which is preferred to be lowered toneg x
instruction. However, SelectionDAG ISel will generatesub 0, x
(FastISel doesn't have this problem though).