[sparc] Bug in convertion from vararg double to int

[Quuxplusone]

Bugzilla Link	PR4994
Status	RESOLVED FIXED
Importance	P normal
Reported by	Sylvère Teissier (quickslyver@free.fr)
Reported on	2009-09-16 11:26:03 -0700
Last modified on	2016-01-15 10:54:24 -0800
Version	trunk
Hardware	PC Linux
CC	adlr@gmail.com, anton@korobeynikov.info, daniel@zuster.org, jyknight@google.com, llvm-bugs@lists.llvm.org
Fixed by commit(s)
Attachments	test_bug.ll (609 bytes, application/octet-stream)
Blocks
Blocked by
See also

Test case (C):
#include <stdarg.h>

int foo (char *fmt, ...)
{
  va_list ap;
  va_start  (ap, fmt);
  return va_arg (ap, double);
}

-----------------------------------------
Test case (LLVM):

; ModuleID = 'test_bug.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-
f32:32:32-f64:64:64-v64:64:64"
target triple = "sparc-unknown-unknown"

define i32 @foo(i8* nocapture %fmt, ...) nounwind {
entry:
  %ap = alloca i8*, align 4                       ; <i8**> [#uses=2]
  %ap1 = bitcast i8** %ap to i8*                  ; <i8*> [#uses=1]
  call void @llvm.va_start(i8* %ap1)
  %0 = va_arg i8** %ap, double                    ; <double> [#uses=1]
  %conv = fptosi double %0 to i32                 ; <i32> [#uses=1]
  ret i32 %conv
}

declare void @llvm.va_start(i8*) nounwind

--------------------------------------------
llc assertion fail:
llc: LegalizeDAG.cpp:762:
llvm::SDValue<unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDValue):
Assertion `(isTypeLegal(Node->getOperand(i).getValueType()) || Node-
>getOperand(i).getOpcode() == ISD::TargetConstant) && "Unexpected illegal
type!"' failed.
0   llc       0x0907c98d
1   llc       0x0907cf59
2             0xb7f7a400 __kernel_sigreturn + 0
3   libc.so.6 0xb7cd2a85 abort + 389
4   libc.so.6 0xb7cc84ee __assert_fail + 238
5   llc       0x08c941bf
6   llc       0x08c9481c
7   llc       0x08c94f35
8   llc       0x08ca18ac
9   llc       0x08ca19ca llvm::SelectionDAG::Legalize(bool,
llvm::CodeGenOpt::Level) + 48
10  llc       0x08c6a4ef llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 3151
11  llc       0x08c6c57b
llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*,
llvm::ilist_iterator<llvm::Instruction>,
llvm::ilist_iterator<llvm::Instruction>) + 487
12  llc       0x08c6d036
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function&,
llvm::MachineFunction&, llvm::MachineModuleInfo*, llvm::DwarfWriter*,
llvm::TargetInstrInfo const&) + 2468
13  llc       0x08c6deb2
llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 886
14  llc       0x08d5f366
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 86
15  llc       0x08ff32dc llvm::FPPassManager::runOnFunction(llvm::Function&) +
306
16  llc       0x08ff3de0 llvm::FunctionPassManagerImpl::run(llvm::Function&) +
124
17  llc       0x08ff3fad llvm::FunctionPassManager::run(llvm::Function&) + 135
18  llc       0x085004ea main + 3466
19  libc.so.6 0xb7cba7a5 __libc_start_main + 229
20  llc       0x084fe721
Stack dump:
1.  Running pass 'SPARC DAG->DAG Pattern Instruction Selection' on function
'@foo'

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Attached test_bug.ll (609 bytes, application/octet-stream): llvm test case

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Are you using clang to compile C code.

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yes it's with clang

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I'm not expert but I think the problem is here: (SparcISelLowering:876)

// Otherwise, load it as i64, then do a bitconvert.
  SDValue V = DAG.getLoad(MVT::i64, dl, InChain, VAList, NULL, 0);

=> A 64 bit Load is not valid on a 32bits Sparc V8 architecture.

[Quuxplusone]

Unfortunately va_arg exists but doesn't really work; we should probably document this somewhere.

The solutions that frontends currently take is the same as with ABI code, they lower it themselves into the appropriate ABI specific code. In this case, no one has written the lowering code for Sparc. This bug is probably really "clang should honor the Sparc ABI"?

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_Bug 9244 has been marked as a duplicate of this bug._

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Fixed now. (Probably by the commit that added support for 64-bit load/store to the sparcv8 backend a few months ago).