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RHSResearchLLC / NiteFury-and-LiteFury

Public repository for Litefury & Nitefury
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PCIe speed, data width and AXI clock frequency combination #52

Closed mayureshw closed 8 months ago

mayureshw commented 8 months ago

I have a certain design with a 64-bit data path. It works well for PCIe speed of 2.5 GT/s and AXI clock of 125 MHz.

I'd think, it should work for PCIe speed of 5 GT/s and AXI clock of 250 MHz, keeping data width as 64 but somehow it is not working.

I haven't yet tried, though may be 5 GT/s, 128-bit data path and 125 MHz might work, but that requires a lot of changes in the design. So wondering if there is any configurable parameter that I may have missed in above design.

mayureshw commented 8 months ago

Haven't tried checking constraints, but probably the design does not work at 250 MHz.