RISCV-on-Microsemi-FPGA / RTG4-Development-Kit

Sample RISC-V Libero projects for the RTG4 Development Kit
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Updated scripted design for Libero v12.3 (tag 12.3-v1.0) #23

Closed seb-slowik closed 4 years ago

seb-slowik commented 4 years ago

This pull-request brings the scripted sample design up to Libero v12.3. It includes all the commits that would otherwise correspond to the following tags: • 12.1-v1.0 • 12.1-v1.1 • 12.2-v1.0 • 12.3-v1.0

Merge conflict resolved by cloning current public RTG4's develop contents and updating that accordingly to reach state of 12.3-v1.0