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RISCV-on-Microsemi-FPGA
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RTG4-Development-Kit
Sample RISC-V Libero projects for the RTG4 Development Kit
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Libero v12.3 design revamp (12.3-v2.0)
#25
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seb-slowik
closed
4 years ago
seb-slowik
commented
4 years ago
This update includes a redesign of the TCL scripts.
The BaseDesign has been simplified to contain only vital components. All components are now found on BaseDesign canvas.
The DDR has been replaced by LSRAM
Names of files, directories and components on the canvas.
Improved strcture of the TCL scripts (different component instantiation technique)
Updated Libero core components.
This update includes a redesign of the TCL scripts.