Some of the RADIANTs left Chicago without having their DAC bits reassigned. Need to add a register to do this.
The whole thing is goddamn annoying because Microchip's an ass and requires LDAC to happen before the ACK, which is impossible in most I2C hardware. Which means we need to "end" the Wire peripheral, reclaim them as GPIOs, and bit-bang the entire I2C transaction.
Note that reading the current address bits is possible, even though the MCP4725 is also on the bus: do a general call, then command 0x0C, toggling the appropriate LDAC at the right time. Then restart, and read from address 0x67. Since there is no device at 0x67, this will only work if we've done it correctly.
Therefore the register should take the device's quad number and new desired I2C address bits. And then we'll also make a "lock & key" value in the top 16-bits of the register to prevent accidental operation.
Then the sequences will have to be:
Put quad into BIST mode
General call (write 0x00)
Command 0x0C, plus BM_MOSI toggle (LDAC) at the right time
Restart
Write address 0x67 plus read (0xCF), read next byte
Verify bit 0 = 0 and bit 4=1. If so, pick off top 3 bits
Do the reassign procedure using those address bits.
Some of the RADIANTs left Chicago without having their DAC bits reassigned. Need to add a register to do this.
The whole thing is goddamn annoying because Microchip's an ass and requires LDAC to happen before the ACK, which is impossible in most I2C hardware. Which means we need to "end" the Wire peripheral, reclaim them as GPIOs, and bit-bang the entire I2C transaction.
Note that reading the current address bits is possible, even though the MCP4725 is also on the bus: do a general call, then command 0x0C, toggling the appropriate LDAC at the right time. Then restart, and read from address 0x67. Since there is no device at 0x67, this will only work if we've done it correctly.
Therefore the register should take the device's quad number and new desired I2C address bits. And then we'll also make a "lock & key" value in the top 16-bits of the register to prevent accidental operation.
Then the sequences will have to be: