Open dragontamer opened 5 years ago
This is actually expected behaviour. Those builtins are only available for intel targets. HCC is a single-source CPU/GPU compiler. So there are two passes; one for CPU (host) and one for GPU (device) targets. On the second pass, the target will be amdgcn, where these builtins are not supported.
This is actually expected behaviour. Those builtins are only available for intel targets. HCC is a single-source CPU/GPU compiler. So there are two passes; one for CPU (host) and one for GPU (device) targets. On the second pass, the target will be amdgcn, where these builtins are not supported.
Thanks for getting back to me on this.
I guess what I expected instead, was for only [[HC]] labeled functions to be compiled in the 2nd pass. I would expect that only a minority of code would be for GPUs (the minority which is called by other [[HC]] functions).
I guess, when I use HCC intrinsics or inline-assembly in a [[hc]] function, there's no compiler error. So I was hoping that x86 intrinsics could be used in a similar manner.
I too am getting this error when compiling sse2 intrinsic. What is the solution when using hcc?
I've got some simple SSE2 code here.
I compile as:
And it outputs the error:
I'm able to get the compiler to run with
#ifdef __HCC_CPU__
, but I doubt that is what is intended. My hcc version is as follows: