issues
search
RRZE-HPC
/
OSACA
Open Source Architecture Code Analyzer
GNU Affero General Public License v3.0
296
stars
18
forks
source link
issues
Newest
Newest
Most commented
Recently updated
Oldest
Least commented
Least recently updated
[BUG] Uppercase register names causes instructions to not match properly
#109
stefandesouza
closed
3 days ago
0
Update parsing of x86 memory segments
#108
MarkusBuettner
closed
1 month ago
0
[BUG] OSACA cannot parse some instructions generated by AdaptiveCpp/Clang
#107
MarkusBuettner
closed
1 month ago
2
[REQUEST] Support Intel assembly syntax
#106
pleroy
opened
4 months ago
2
SPR and Neoverse V2 support
#105
JanLJL
closed
5 months ago
0
[BUG] Register dependency not detected with x86 conditional move instructions
#104
dgazzoni
opened
7 months ago
0
[REQUEST] Add support for handling comments generated by fcc compiler at the beginning of instruction code.
#103
adityauj
opened
8 months ago
0
Instruc form
#102
stefandesouza
closed
5 months ago
0
Feat/m1
#101
JanLJL
closed
9 months ago
0
No throughput/latency information for vbroadcast
#100
IgorBaratta
closed
11 months ago
2
Add new u-arch: Neoverse N1 (Ampere Altra Max)
#99
JanLJL
closed
1 year ago
1
Add new u-arch: Intel Sapphire Rapids (SPR)
#98
JanLJL
opened
1 year ago
0
Add new u-arch: AMD Zen4 (Genoa)
#97
JanLJL
opened
1 year ago
0
Add support for structured YAML output
#96
stephenswat
closed
1 year ago
2
Add IMUL instruction for Zen 3 architectures
#95
stephenswat
closed
1 year ago
0
Profile OSACA to find out what parts are slow and where we have to change code for performance improvements
#94
JanLJL
opened
1 year ago
2
OSACA fails on godbolt.org with KeyError: "Port 'D' not in port list."
#93
TiborGY
closed
1 year ago
1
Support for flags and conditional ops on AArch64
#92
dgazzoni
closed
1 year ago
0
Parallel LCD computation fails on macOS
#91
dgazzoni
opened
1 year ago
1
[ARM] Incorrect dependency graph for store dependent on post-indexed load
#90
dgazzoni
closed
1 year ago
1
[ARM] Incorrect parsing of NEON instructions targeting individual lanes
#89
dgazzoni
closed
1 year ago
4
iacaMarks.h compatibility
#88
hpcbern
closed
2 years ago
1
Patch linter
#87
JanLJL
closed
2 years ago
1
Update lint.yml
#86
JanLJL
closed
2 years ago
0
fix a bug when 'mov' is the last instruction
#85
qcjiang
closed
2 years ago
1
Feature/tsv110
#84
qcjiang
closed
2 years ago
1
Feature/tsv110
#83
qcjiang
closed
2 years ago
0
fix a bug when the hex_number of address is negative
#82
qcjiang
closed
2 years ago
0
[ARM] Multiply-accumulate output register dependency not recognized
#81
dgazzoni
closed
1 year ago
1
Feature/tsv110
#80
qcjiang
closed
2 years ago
2
x86 NOT instruction doesn't add a cycle to the critical path
#79
mpermino
closed
2 years ago
1
x86 OR instruction breaks LCD analysis
#78
mpermino
closed
2 years ago
1
Instruction is missing
#77
ghisloine
closed
3 years ago
1
Import asmbench result
#76
ghisloine
closed
3 years ago
1
Bug with working with A64FX assembly code.
#75
v0dro
closed
3 years ago
5
Hex immediate are not recognized.
#74
mlomonaco
closed
3 years ago
7
unsupported jmpq instruction in parser_x86att.py
#73
jdomke
closed
3 years ago
0
osaca not terminating
#72
jdomke
closed
3 years ago
2
Validation
#71
cod3monk
closed
3 years ago
0
Benchmark with test fails on SNB
#70
andreas-abel
closed
3 years ago
2
Benchmark with xor fails on HSW
#69
andreas-abel
closed
3 years ago
1
Benchmark with cmp fails on IVB
#68
andreas-abel
closed
3 years ago
3
Benchmark with movb fails on ICL
#67
andreas-abel
closed
3 years ago
1
Benchmark fails on ICL
#66
andreas-abel
closed
3 years ago
1
passing parsing errors to the outside
#65
cod3monk
closed
3 years ago
0
Parsing negative hex offsets fails
#64
andreas-abel
closed
3 years ago
2
Throughput output
#63
andreas-abel
closed
3 years ago
5
att parser: workaround for crash with "jg,pt" mnemonic
#62
jdomke
closed
3 years ago
0
att parser crashes for vbroadcastsd -0x...
#61
jdomke
closed
3 years ago
0
Add support for ARM Cortex-A72
#60
Tobi29
closed
2 years ago
2
Next