Open d-m-bailey opened 1 year ago
That seems odd, though, because I've been running LVS on the SRAM successfully for a long time. Is it possible that the last change to speed up extraction times affects this somehow?
I don't think recent code changes have anything to do with this. It is a very weird problem that can only happen in ext2spice
because the .ext file for openram_dff does not even contain any references to the uppercase names. It does have upper and lower case "CLK" and "clk" and those got reduced to just "clk" in the netlist. So it appears that "VDD" and "GND" are being gratuitously added to the port list for no obvious reason.
@RTimothyEdwards I was thinking it might have something to do with the label/pin switch. Used to get VDD
is shorted to vdd
messages in the extraction log, but no longer. I think we're missing a lot of short messages; I'll see if I can collect some data.
@d-m-bailey : I think there is a quick solution here while I work on the underlying problem. The superficial problem is that extract no all
was used to prevent extraction of parasitics. However, that also sets extract no aliases
which is preventing the (non-port) labels from being output in an equiv
statement.
There are actually a lot of things going wrong to make this error happen. The "merge" statements are preferring the non-port name "VDD" to the name "vdd" when making the node merge in the parent cell. OpenRAM is not writing either label "VDD" or "vdd" as a port to the DFF cell. And "extract no all" is turning off alias name output in the .ext files.
I suggest for now replacing extract no all
with extract no all ; extract do aliases
in the extraction script. I need to fix the problem where the merge
connections are being made to the non-preferred name (which might be difficult since neither label is marked as a port, although there is at least supposed to be a strict typographical order to determine what is a "preferred" name).
Great! I'll make the change to the extraction scripts and retry. Thanks for the suggestion.
Adding extract do aliases
remedied the connectivity issue.
Getting size errors in the memory cell now... I'll check to see if it's netgen version related.
Yes, the parameter extraction on the sram bitcells has changed. I'll log a new issue.
MPW-8 slot-015 uses
sram_2kbyte_1rw1r_32x512_8
.The
openram_dff
cell has bothVDD
andvdd
labels andGND
andgnd
labels on the layout.This extracts to
with floating
vdd
andgnd
ports.During LVS, the parent circuit
dff_buf_0
matches topologically but has a port mismatch.netgen attempts to alter the pin list to match, and gives this message.
At the higher levels, the
gnd
pin of the a sister cell is seen as connected tovdd
even though it is not.vdd
is seen as disconnected even though it is not.Will also log a netgen issue.