search

RTimothyEdwards / netgen

Netgen complete LVS tool for comparing SPICE or verilog netlists
Other
109 stars 25 forks source link

Netlists created with ext2spice short resistor should be equivalent to those created without #80

Open d-m-bailey opened 1 year ago

d-m-bailey commented 1 year ago

https://github.com/RTimothyEdwards/magic/issues/262

RTimothyEdwards commented 1 year ago

Ultimately this issue appears to be both an issue in magic and an unrelated issue in netgen. I have determined that the problem in netgen is that a shorting device like a zero-valued resistor or voltage source should never be removed to "make a better match" if it is connecting two ports together. Otherwise the ports get scrambled. Unscrambling them is a pain. It seems much better just to let the cell match fail in that case, get flattened, and try to resolve the zero-valued device in the next hierarchical level up. That continues until either the device does not connect to two ports, and can be safely removed and the nets merged, or until it reaches the top of the hierarchy, in which it can be treated as a port error, but there is no hierarchy above that can get affected by the mismatched ports.

With this change, the testcase referenced above in the issue in Magic ends up as a unique matching result.

The code fix is in netgen version 1.5.257.