Changes for LVS and softcheck

[d-m-bailey]

magic technology Added nowell variants to magic technology to extract with no well/substrate connections.

netgen setup Removed check for GDS extraction to ignore empty cells. Made parallelization for fill/tap/decap cells more generic. Ignore prefixes (XX_) and suffixes ($0) when comparing layout to source.

[d-m-bailey]

Should resolve #381

[d-m-bailey]

@RTimothyEdwards Please ignore the previous comment (deleted). There was an omission in the sky130B.tech file I was using that doesn't match the quoted sky130A version quoted above.

[RTimothyEdwards]

@d-m-bailey : In sky130, you removed the entire section of the netgen setup file that ignores the fill and tap cells. But isn't that section necessary because those cells get removed from the extracted layout and therefore can never compare correctly to a verilog gate level netlist that has them?

Then in the gf180mcu setup, the fill and tap cells are always ignored, which is followed by an attempt to parallel combine them, which should never work because they've been ignored.

I'm not sure what the best solution is, but it needs to work for several different ways of doing extraction. The original reason for the "ifdef" was that when extracting from a layout in .mag format using the PDK libraries, the fill and tap cells could be retained by marking them as abstract (or all cells can be marked as abstract, by using the abstract views). Since the marking is not a GDS layer, then it is not preserved when writing GDS, so when reading back layout from GDS, then cells are not abstract (cell replacement could be done, but that would be making broad assumptions about the data in the GDS being the same as the data in the PDK, which is generally unwarranted), and cells like fill and tap will vanish upon being extracted. So I don't see any way around needing to treat these two extraction cases differently in the netgen setup.

[d-m-bailey]

@RTimothyEdwards Thanks for checking. The LVS setup that we're adding to precheck has the following parameter (from lvs_config.md)

• EXTRACT_ABSTRACT : List of cells to extract as abstract devices. Normally, cells that do not contain any devices will be flattened during netlisting. Using this variable can prevent unwanted flattening of empty cells. This has no effect of cells that are flattened because of a small number of layers. Internal connectivity is maintained (at least at the top level).

The base lvs_config.json sky130 file is

$ head -50 tech/sky130A/lvs_config.base.json
{
        "EXTRACT_FLATGLOB": [
                "*sky130_fd_pr__*[A-Z]*"
        ],
        "EXTRACT_ABSTRACT": [
                "*__fill_*",
                "*__fakediode_*",
                "*__tapvpwrvgnd_*"
        ],
        "LVS_FLATTEN": [
                ""
        ],
        "LVS_NOFLATTEN": [
                ""
        ],
        "LVS_IGNORE": [
                ""
        ],
        "LVS_SPICE_FILES": [
                "$PDK_ROOT/$PDK/libs.ref/$STD_CELL_LIBRARY/spice/*.spice"
        ],
        "LVS_VERILOG_FILES": [
                ""
        ]
}

This causes the specified cells to be extracted as black-boxes and allows them to be compared during LVS.

The MAGIC_EXT_USE_GDS variable in the current setup file was something that I added to openlane when adding the -lvs option to flow.tcl. We're moving away from that largely unknown, undocumented and inflexible option to a more robust version in precheck. That is why I removed it.

As far as the gf180mcu fill devices being ignored, that was an oversight on my part. Since the endcap and filltie cells exist in the gate level verilog and are extractable as abstract devices, it is not necessary to ignore them. I'll test this and make another PR later.

The fill cells also exist in the gate level verilog, but get flattened during extraction due to the gds flatten yes option that flattens cells with few layers. Is there a way to exclude specific cells from the gds flattening process?