LVS fail - Errors encountered in synthesis flow

RTimothyEdwards / qflow

Qflow full end-to-end digital synthesis flow for ASIC designs

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LVS fail - Errors encountered in synthesis flow #23

Open K0rrid0r opened 3 years ago

K0rrid0r commented 3 years ago

Just trying to run the test seems impossible at this point, tried several different commits all fail at some point with map9v3.v

This is commit f3c9713f527ab068caaeaf269f387e156e9d73c1 and its the closest ive come to the end step Cleanup

Any suggestions how to fix this?, I just want to run the test successfully :)

lvs.log comp.zip

ju-sh commented 3 years ago

I too am having this problem. Hopefully a solution can be found. :-)

Was following the tutorial from here.

Using netgen v1.5.173

ju-sh commented 3 years ago

But my error is slightly different from that of @K0rrid0r.

For me it says:

Circuit 1 contains 206 devices,  Circuit 2 contains 206 devices
Circuit 1 contains 228 nets,     Circuit 2 contains 220 nets. *** MISMATCH ***

svenn71 commented 3 years ago

On one machine where I can complete qflow gui with map9v3 without errors, sha 08ffd272bcc07c63a831477c589f9b568b9f2ea5 of qflow is installed. A git diff origin/master show loads of changes, among them, the failing set commands mentioned.

The other tools in that particular installation has the following SHA:

Program	Commit
yosys	commit 708eb327a1e88f726b8d426dba35abc29339a634
graywolf	commit f47937b66d4d44eafc4224f7c43d556dbf88f05b
qrouter	commit 1cef004055e20dc4f8f5c149b0751e0a87597586
magic	commit 2a1494e4d1b595da2452b6fe0889faaa8eab48ec
netgen	commit a034fc16d6eb1080e4ee5de0eabf09970a08c74d

S-PADMANABAN-2001 commented 1 year ago

Try to make the codes given inside always@ static