RTimothyEdwards / qflow

Qflow full end-to-end digital synthesis flow for ASIC designs
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Routing an already placed DEF/GDS file (Gate Array) #53

Open thud06 opened 5 months ago

thud06 commented 5 months ago

I have an already placed array of logic complete custom gates (Gate Array) I have all the neccessary files, LEF, verilog netlist, GDS, DEF, etc. I need to route these together, but I cant seem to get QFLOW to do this properly. Does anyone have an Idea on how I can get this to work? Sorry for the newb-ness.

Thanks in advance !