Rahix / avr-hal

embedded-hal abstractions for AVR microcontrollers
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Hmm, I also found this [Stackoverflow Answer](https://electronics.stackexchange.com/a/390541) which might give a good base: #387

Closed lemurcina closed 1 year ago

lemurcina commented 1 year ago
    Hmm, I also found this [Stackoverflow Answer](https://electronics.stackexchange.com/a/390541) which might give a good base:

"4" The last digit marks the series of chips. Within a series they are often pin-compatible and share a similar set of features. Some prominent series are:

  • 'no digit' - these are the first generation chips with 8 to 128 kiB Flash
  • '8' - a series from 4 to 32 kiB Flash, all in the same housing. More or less an improved version of the original chips
  • '4' similar to '8', but in larger packages with more pins (~40 instead of ~30) and up to 128 kiB Flash
  • '5' similar to '4', but with more timers and PWM channels
  • '0','1' rather old family with large packages (60 - 100 pins) and up to 256 kiB Flash.
  • '9' with integrated LCD controller
  • 'U2', 'U4' are the two sizes of USB-enabled controllers
  • '08', '09' newest family with additional configurable logic and more CPU-bypassing features
  • '50', '90' the largest chips with 100 pins, but few peripherals

I think we can group some of them even more. For a start, I'd (without looking deeper) group the ATmega devices like this:

for the others, we don't currently have any devices supported, so we can take care of them later. For the ATtiny devices, I think we can try to merge the info from your link with this kind of 'generation' numbering scheme, to derive a sensible partitioning.

What also needs to be evaluated is how to name those crates ... Not sure what would be intuitive.

Originally posted by @Rahix in https://github.com/Rahix/avr-hal/issues/94#issuecomment-736545626

Rahix commented 1 year ago

Sorry, can you elaborate what you created this issue for? Maybe I am missing something?