Clarify the naming of GPIO pins

[edgar-bonet]

The naming/numbering of user-accessible GPIO pins is very confusing: the numbers 4, 12, 20, 74 and 980 all refer to the same pin in different numbering schemes. This pull request brings some clarity by:

• listing and naming every user-visible naming/numbering scheme
• adding a table with a clear mapping between all these schemes
• removing information that is irrelevant (why should I care about “MIO”, ARCH_NR_GPIOS, ZYNQ_GPIO_NR_GPIOS or exp_p_io? what does exp_p_io even mean?) or incomplete (where can I find linux-xlnx-xilinx-v2017.2?)
• adding two numbering schemes that the user is likely to come across, as they appear in the output of gpioinfo.

[Lightsaver7]

I agree with the proposed changes. With the next update, I will add a column in one of the changed tables - exp_p_io and exp_n_io are actually the names used inside the FPGA for configuring the GPIO pins