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Red Pitaya Ecosystem and Applications
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Vivado 2014 support #10

Closed hmaarrfk closed 9 years ago

hmaarrfk commented 10 years ago

ISE is discontinued after 2013. Are there any plans to make your designs compatible with Vivado 2014?

Currently, one is not able to make the project due to the following errors:

CRITICAL WARNING: [Board 49-4] Problem parsing board_part file - /opt/Xilinx/Vivado/2014.2/data/boards/board_parts/zynq/zc706/1.0/board_part.xml, The board part 'xc7z045ffg900-2' is either not supported or invalid.
CRITICAL WARNING: [Board 49-4] Problem parsing board_part file - /opt/Xilinx/Vivado/2014.2/data/boards/board_parts/zynq/zc706/0.9/board_part.xml, The board part 'xc7z045ffg900-2' is either not supported or invalid.
CRITICAL WARNING: [Board 49-4] Problem parsing board_part file - /opt/Xilinx/Vivado/2014.2/data/boards/board_parts/kintex7/kc705/1.0/board_part.xml, The board part 'xc7k325tffg900-2' is either not supported or invalid.
CRITICAL WARNING: [Board 49-4] Problem parsing board_part file - /opt/Xilinx/Vivado/2014.2/data/boards/board_parts/kintex7/kc705/0.9/board_part.xml, The board part 'xc7k325tffg900-2' is either not supported or invalid.

As well as some IP that needs to be updated from version 5.3 to version 5.4.

HrRossi commented 10 years ago

Afaik these warnings being critical is an issue of Vivado 2014.2, and can be remedied by making the design tools ignore this specific warning (which was present in earlier versions too, but not critical). I can't find the relevant posts anymore, but the solution was to downgrade the error. With the project open, type the following in the tcl-console: set_msg_config -id {Board 49-4} -new_severity {Warning}

I currently work in 2014.1 and there were only minor modifications neccessary to build the fpga bitstream. I'll put them in a new branch on my RP fork, if you're interested.

hmaarrfk commented 10 years ago

I would definitely be interested. I'll follow your fork.

I'm even having trouble following their instructions to build the system with the recommended version of Vivado.

I actually get further along the build process with version 2014.1/2

HrRossi commented 10 years ago

Branch dev_mybuild is up, based on current master (rev 0.92). 6ed5bf27faf75e01f8a4f323bce88dc16435b724 contains the changes in code that were neccessary to build the fpga bitstream in Vivado 2014.1. Note that this branch still uses the 2013.3 design-suite to build the software components. The 2014.1 fpga bitstream is imported from a separate 2014.1 project. This is because I'm currently unable to use SDK 2014.1 due to a licensing issue (generated a node-locked license for SDK from within a VM, which as it turns out is not possible, and now I'm stuck with an unusable license that I also can not rehost). Further work would be needed to migrate the 2013.3 based software build to 2014.1, because several steps in the process now work differently, eg. 2014.1 does no longer have a libgen tool.

Also note that the branch contains several changes (marked with "not for public commit") that cater to my build-environment and need to be cherry-picked around or at least modified to suite your own needs, eg. using pre-downloaded source-packages, different Xilinx-tool-path, the aforementioned import of pre-built bitstream, etc.

hmaarrfk commented 10 years ago

Man it does not seem to be an easier solution. I've been trying to compile the tools with 2013.3 and ISE 14.6 but there seems to be a version mismatch between some if the drivers for the FPGA bit. Can't find out how to solve them all.

HrRossi commented 10 years ago

Since this seems to be more of an issue with your build environment, let's close it here and move it to the forum