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Remillard / VHDL-Mode

A package for Sublime Text that aids coding in the VHDL language.
MIT License
39 stars 10 forks source link

Support syntax highlight of block statement without the optional "is". #169

Closed kalund closed 1 year ago

kalund commented 1 year ago

The "is" for block statements is optional in vhdl, and to change it is easy. Please change line 1683 from:

https://github.com/Remillard/VHDL-Mode/blob/35d2b6ad022b30bdd23e4e89779f9b8b0486fee2/Syntax/VHDL.sublime-syntax#L1683

Remillard commented 1 year ago

Is this something you have tested thoroughly? I accept pull requests if you'd like to do that. I do seem to remember there was one case where I mandated the use of is in an optional case because the syntax was capable of being confused in other circumstances. I don't remember that this is the situation though and I think I probably commented that heavily in the syntax file because it was definitely out of character.

In any event, I've largely (almost entirely) moved back to using Emacs so I've not gotten much done here on this package. However PRs would be great.

Remillard commented 1 year ago

See pull request https://github.com/Remillard/VHDL-Mode/pull/170 for why this is not currently possible or desireable.