Add support for ResetNextIf, SubHits, Trigger, BCD, and */& comparisons. Fixed issue where AddSource, SubSource and AddAddress lines still showed the second half of the comparison.
This resolved #72.
Using the same example string as https://github.com/RetroAchievements/RAWeb/pull/570
The changes in this commit using A:0xH00b3a3_46134=0_D:d0xH00b406=0_B:p0xH00b4b5_Q:b0xH00b546=0_O:0xH00b57a=0_T:46289=0_Z:b0xH00b4f9=0_I:0xH00b578_d0xH00b4cb=224_A:0xH00fbc8*d0xH000234_B:0xH00fc59/b0xH000431_I:0xH00fc53&1 produce the following output:
__**Core Group**__:
1:AddSource Mem 8-bit 0x00b3a3
2: Value 0x00b436 = Value 0x000000 (0)
3:SubHits Delta 8-bit 0x00b406 = Value 0x000000 (0)
4:SubSource Prior 8-bit 0x00b4b5
5:MeasuredIf BCD 8-bit 0x00b546 = Value 0x000000 (0)
6:OrNext Mem 8-bit 0x00b57a = Value 0x000000 (0)
7:Trigger Value 0x00b4d1 = Value 0x000000 (0)
8:ResetNextIf BCD 8-bit 0x00b4f9 = Value 0x000000 (0)
9:AddAddress Mem 8-bit 0x00b578
10: Delta 8-bit 0x00b4cb = Value 0x0000e0 (0)
11:AddSource Mem 8-bit 0x00fbc8 * Delta 8-bit 0x000234 (0)
12:SubSource Mem 8-bit 0x00fc59 / BCD 8-bit 0x000431 (0)
13:AddAddress Mem 8-bit 0x00fc53 & Value 0x000001 (0)
Or viewed in Discord:
Which match the expected results based on the RAWeb commit.
meleu
commented
2 years ago
Add support for ResetNextIf, SubHits, Trigger, BCD, and */& comparisons. Fixed issue where AddSource, SubSource and AddAddress lines still showed the second half of the comparison.
This resolved #72.
Using the same example string as https://github.com/RetroAchievements/RAWeb/pull/570 The changes in this commit using
A:0xH00b3a3_46134=0_D:d0xH00b406=0_B:p0xH00b4b5_Q:b0xH00b546=0_O:0xH00b57a=0_T:46289=0_Z:b0xH00b4f9=0_I:0xH00b578_d0xH00b4cb=224_A:0xH00fbc8*d0xH000234_B:0xH00fc59/b0xH000431_I:0xH00fc53&1produce the following output:Or viewed in Discord:
Which match the expected results based on the RAWeb commit.