RobertCNelson / bb-kernel

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GPMC not working in Kernel 4.1.17-bone-rt-r18 #21

Closed QuickJack closed 8 years ago

QuickJack commented 8 years ago

I am testing this using the Logibone Cape. I am using am335x-boneblack-overlay.dtb during boot. This should disable eMMC as well as HDMI (Video/Audio). I have modified the original .dts file by commenting out the eEMMC reset pin which would otherwise cause a conflict.

I am measung at pin P8.10 (GPMC_WEN). When writing to /dev/logibone_mem this pin should get asserted. This works fine using the old Kernel 3.8 but fails using Kernel 4.1.x+.

Is there any example for using the GPMC under Kernel 4.1.x+?

QuickJack commented 8 years ago

Still present in 4.1.17-bone-rt-r19. Here is my modified .dts file:

/*
 * optargs=capemgr.disable_partno=BB-BONE-EMMC-2G
 * "arch/arm/boot/dts/am335x-boneblack.dts", find the section starting
 * with "&mmc2 {" and in section change  status = "okay" into "disabled".
 * do once : mmc dev 1
 *           mmc rstn 1
 * in uBoot or in uEnv and then delete
 */
/dts-v1/;
/plugin/;
/ {
    compatible = "ti,beaglebone", "ti,beaglebone-black";
    /* identification */
    part-number = "BB-BONE-LOGIBONE";
    version = "00A3";
    /* state the resources this cape uses */
    exclusive-use =
        /* the pin header uses */
        "P8.25",    /* gpmc: gpmc_ad0 */
        "P8.24",    /* gpmc: gpmc_ad1 */
        "P8.5",     /* gpmc: gpmc_ad2 */
        "P8.6",     /* gpmc: gpmc_ad3 */
        "P8.23",    /* gpmc: gpmc_ad4 */
        "P8.22",    /* gpmc: gpmc_ad5 */
        "P8.3",     /* gpmc: gpmc_ad6 */
        "P8.4",     /* gpmc: gpmc_ad7 */
        "P8.19",    /* gpmc: gpmc_ad8 */
        "P8.13",    /* gpmc: gpmc_ad9 */
        "P8.14",    /* gpmc: gpmc_ad10 */
        "P8.17",    /* gpmc: gpmc_ad11 */
        "P8.12",    /* gpmc: gpmc_ad12 */
        "P8.11",    /* gpmc: gpmc_ad13 */
        "P8.16",    /* gpmc: gpmc_ad14 */
        "P8.15",    /* gpmc: gpmc_ad15 */
        "P9.13",    /* gpmc: gpmc_wpn */
        "P8.21",    /* gpmc: gpmc_csn1 */
        "P8.18",    /* gpmc: gpmc_clk */
        "P8.7",     /* gpmc: gpmc_advn_ale */
        "P8.8",     /* gpmc: gpmc_oen_ren */
        "P8.10",    /* gpmc: gpmc_wen */
        "P8.9",     /* gpmc: gpmc_ben0_cle */
        "gpmc";
        /* the reset pin */
        /*"eMMC_RSTn";*/
    #address-cells = <1>;
    #size-cells = <1>;
    fragment@0 {
        target = <&am33xx_pinmux>;
        __overlay__ {
            gpmc_pins: pinmux_gpmc_pins {
                pinctrl-single,pins = <
                    0x000 0x30  /* gpmc_ad0.gpmc_ad0 MODE0 | INPUT | PULLUP */
                    0x004 0x30  /* gpmc_ad1.gpmc_ad1 MODE0 | INPUT | PULLUP */
                    0x008 0x30  /* gpmc_ad2.gpmc_ad2 MODE0 | INPUT | PULLUP */
                    0x00C 0x30  /* gpmc_ad3.gpmc_ad3 MODE0 | INPUT | PULLUP */
                    0x010 0x30  /* gpmc_ad4.gpmc_ad4 MODE0 | INPUT | PULLUP */
                    0x014 0x30  /* gpmc_ad5.gpmc_ad5 MODE0 | INPUT | PULLUP */
                    0x018 0x30  /* gpmc_ad6.gpmc_ad6 MODE0 | INPUT | PULLUP */
                    0x01C 0x30  /* gpmc_ad7.gpmc_ad7 MODE0 | INPUT | PULLUP */
                    0x020 0x30  /* gpmc_ad8.gpmc_ad8 MODE0 | INPUT | PULLUP */
                    0x024 0x30  /* gpmc_ad9.gpmc_ad9 MODE0 | INPUT | PULLUP */
                    0x028 0x30  /* gpmc_ad10.gpmc_ad10 MODE0 | INPUT | PULLUP */
                    0x02C 0x30  /* gpmc_ad11.gpmc_ad11 MODE0 | INPUT | PULLUP */
                    0x030 0x30  /* gpmc_ad12.gpmc_ad12 MODE0 | INPUT | PULLUP */
                    0x034 0x30  /* gpmc_ad13.gpmc_ad13 MODE0 | INPUT | PULLUP */
                    0x038 0x30  /* gpmc_ad14.gpmc_ad14 MODE0 | INPUT | PULLUP */
                    0x03C 0x30  /* gpmc_ad15.gpmc_ad15 MODE0 | INPUT | PULLUP */
                    0x080 0x08  /* gpmc_cscn1.gpmc_cscn1 MODE0 | OUTPUT */
                    0x08C 0x28  /* gpmc_clk.gpmc_clk MODE0 | INPUT */
                    0x090 0x08  /* gpmc_advn_ale.gpmc_advn_ale MODE0 | OUTPUT */
                    0x094 0x08  /* gpmc_oen_ren.gpmc_oen_ren MODE0 | OUTPUT */
                    0x098 0x08  /* gpmc_wen.gpmc_wen MODE0 | OUTPUT */
                    0x09C 0x08  /* gpmc_ben0_cle.gpmc_ben0_cle MODE0 | OUTPUT */
                    0x078 0x08  /* gpmc_ben1_cle.gpmc_ben1_cle MODE0 | OUTPUT */
                >;
            };

            fpga_config_pins: pinmux_fpga_config_pins {
                pinctrl-single,pins = <
                    /* config clk and data */
                    0x198 0x37      /*  spi1_d1 MODE3 | INPUT | PULLUP , serial data config */
                    0x190 0x37  /* spi1_sclk MODE3 | INPUT | PULLUP, serial clock config  */
                >;
            };
        };
    };
    fragment@1 {
        target = <&gpmc>;
        depth = <1>;    /* only create devices on depth 1 */
        /* stupid warnings */
        #address-cells = <1>;
        #size-cells = <1>;
        __overlay__ {
            status = "okay";
            #address-cells = <2>;
            #size-cells = <1>;
            pinctrl-names = "default";
            pinctrl-0 = <&gpmc_pins>;
            /* chip select ranges */
            ranges = <1 0 0x01000000 0x1000000>;
            camera{
                compatible = "logibone";
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <&fpga_config_pins>;
                /*reset = <&rstctl 0 0>;*/
                /*reset-names = "eMMC_RSTn-LOGIBONE";*/
                reg = <1 0 0x01000000>; /*CSn1*/

                bank-width = <2>;       /* GPMC_CONFIG1_DEVICESIZE(1) */
                /*gpmc,burst-write;*/
                gpmc,burst-read;
                gpmc,burst-wrap;
                gpmc,sync-read;     /* GPMC_CONFIG1_READTYPE_ASYNC */
                gpmc,sync-write;        /* GPMC_CONFIG1_WRITETYPE_ASYNC */
                gpmc,clk-activation-ns = <0>;   /* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
                gpmc,burst-length = <16>;   /* GPMC_CONFIG1_PAGE_LEN(2) */
                gpmc,mux-add-data = <2>;    /* GPMC_CONFIG1_MUXTYPE(2) */
                gpmc,sync-clk-ps = <20000>; /* CONFIG2 */
                gpmc,cs-on-ns = <0>;
                gpmc,cs-rd-off-ns = <100>;
                gpmc,cs-wr-off-ns = <60>;
                gpmc,adv-on-ns = <0>;       /* CONFIG3 */
                gpmc,adv-rd-off-ns = <20>;
                gpmc,adv-wr-off-ns = <20>;
                gpmc,we-on-ns = <20>;       /* CONFIG4 */
                gpmc,we-off-ns = <60>;
                gpmc,oe-on-ns = <20>;
                gpmc,oe-off-ns = <100>;
                gpmc,page-burst-access-ns = <20>;   /* CONFIG 5 */
                gpmc,access-ns = <80>;
                gpmc,rd-cycle-ns = <120>;
                gpmc,wr-cycle-ns = <80>;
                gpmc,wr-access-ns = <40>;       /* CONFIG 6 */
                gpmc,wr-data-mux-bus-ns = <20>;
                /*gpmc,bus-turnaround-ns = <40>;*/      /* CONFIG6:3:0 = 4 */
                /*gpmc,cycle2cycle-samecsen;*/      /* CONFIG6:7 = 1 */
                /*gpmc,cycle2cycle-delay-ns = <40>;*/   /* CONFIG6:11:8 = 4 */
                /* not using dma engine yet, but we can get the channel number here */
                dmas = <&edma 20>;
                dma-names = "logibone";
                fpga,config {
                    i2c-adapter = <&i2c2>;
                    /* need it to stop the whinning */
                    #address-cells = <1>;
                    #size-cells = <0>;
                    /* fake i2c device node */
                    pca9534 {
                        compatible = "logibone";
                        reg = <0x24>;
                    };
                };
            };
        };
    };
    fragment@2 {
        target = <&spi0>;
        __overlay__ {
            #address-cells     = <1>;
            #size-cells     = <0>;
            status            = "okay";
            pinctrl-names    = "default";
            pinctrl-0        = <&fpga_config_pins>;

            spi0_0{
                #address-cells       = <1>;
                #size-cells       = <0>;
                compatible           = "spidev";
                reg               = <0>;
                spi-max-frequency = <16000000>;
                spi-cpha;
            };
            spi0_1{
                #address-cells       = <1>;
                #size-cells       = <0>;
                compatible           = "spidev";
                reg               = <1>;
                spi-max-frequency = <16000000>;
                // Mode 0 (CPOL = 0, CPHA = 0)
            };
        };
    };
 };
RobertCNelson commented 8 years ago

I just put in an order for this cape:

https://www.element14.com/community/docs/DOC-69215

i think i have the camera cape that uses the same interface..

Regards,

QuickJack commented 8 years ago

The GPMC bus itself is a very interesting technology. However, it's also very complex. I had a lot of trouble to get it working under 3.8.13. The performance isn't nearly as good as expected.

jcdevel commented 8 years ago

This dts is working for me with kernel v4.1.17-bone19 and am335x-boneblack-overlay.dtb:

/*
 * DTS for Logibone R1
 */

/dts-v1/;
/plugin/;

/ {
    compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";

    /* identification */
    part-number = "BB-BONE-LOGIBONE";
    version = "00R1";

    /* state the resources this cape uses */
    exclusive-use =
        /* the pin header uses */
        "P8.25",    /* gpmc: gpmc_ad0 */
        "P8.24",    /* gpmc: gpmc_ad1 */
        "P8.5",     /* gpmc: gpmc_ad2 */
        "P8.6",     /* gpmc: gpmc_ad3 */
        "P8.23",    /* gpmc: gpmc_ad4 */
        "P8.22",    /* gpmc: gpmc_ad5 */
        "P8.3",     /* gpmc: gpmc_ad6 */
        "P8.4",     /* gpmc: gpmc_ad7 */
        "P8.19",    /* gpmc: gpmc_ad8 */
        "P8.13",    /* gpmc: gpmc_ad9 */
        "P8.14",    /* gpmc: gpmc_ad10 */
        "P8.17",    /* gpmc: gpmc_ad11 */
        "P8.12",    /* gpmc: gpmc_ad12 */
        "P8.11",    /* gpmc: gpmc_ad13 */
        "P8.16",    /* gpmc: gpmc_ad14 */
        "P8.15",    /* gpmc: gpmc_ad15 */
        "P9.12",    /* gpmc: gpmc_ben1 */
        "P8.21",    /* gpmc: gpmc_csn1 */
        "P8.18",    /* gpmc: gpmc_clk */
        "P8.7",     /* gpmc: gpmc_advn_ale */
        "P8.8",     /* gpmc: gpmc_oen_ren */
        "P8.10",    /* gpmc: gpmc_wen */
        "P8.9",     /* gpmc: gpmc_ben0_cle */
        "P9.28",
        "P9.29",
        "P9.30",
        "P9.31",
        "gpmc",
        /* the reset pin */
        "eMMC_RSTn";

    /*#address-cells = <1>;*/
    /*#size-cells = <1>;*/

    fragment@0 {
        target = <&am33xx_pinmux>;
        __overlay__ {

            gpmc_pins: gpmc_pins {
                pinctrl-single,pins = <
                    0x000 0x30  /* gpmc_ad0.gpmc_ad0 MODE0 | INPUT | PULLUP */
                    0x004 0x30  /* gpmc_ad1.gpmc_ad1 MODE0 | INPUT | PULLUP */
                    0x008 0x30  /* gpmc_ad2.gpmc_ad2 MODE0 | INPUT | PULLUP */
                    0x00C 0x30  /* gpmc_ad3.gpmc_ad3 MODE0 | INPUT | PULLUP */
                    0x010 0x30  /* gpmc_ad4.gpmc_ad4 MODE0 | INPUT | PULLUP */
                    0x014 0x30  /* gpmc_ad5.gpmc_ad5 MODE0 | INPUT | PULLUP */
                    0x018 0x30  /* gpmc_ad6.gpmc_ad6 MODE0 | INPUT | PULLUP */
                    0x01C 0x30  /* gpmc_ad7.gpmc_ad7 MODE0 | INPUT | PULLUP */
                    0x020 0x30  /* gpmc_ad8.gpmc_ad8 MODE0 | INPUT | PULLUP */
                    0x024 0x30  /* gpmc_ad9.gpmc_ad9 MODE0 | INPUT | PULLUP */
                    0x028 0x30  /* gpmc_ad10.gpmc_ad10 MODE0 | INPUT | PULLUP */
                    0x02C 0x30  /* gpmc_ad11.gpmc_ad11 MODE0 | INPUT | PULLUP */
                    0x030 0x30  /* gpmc_ad12.gpmc_ad12 MODE0 | INPUT | PULLUP */
                    0x034 0x30  /* gpmc_ad13.gpmc_ad13 MODE0 | INPUT | PULLUP */
                    0x038 0x30  /* gpmc_ad14.gpmc_ad14 MODE0 | INPUT | PULLUP */
                    0x03C 0x30  /* gpmc_ad15.gpmc_ad15 MODE0 | INPUT | PULLUP */
                    0x080 0x08  /* gpmc_cscn1.gpmc_cscn1 MODE0 | OUTPUT */
                    0x08C 0x28  /* gpmc_clk.gpmc_clk MODE0 | INPUT */
                    0x090 0x08  /* gpmc_advn_ale.gpmc_advn_ale MODE0 | OUTPUT */
                    0x094 0x08  /* gpmc_oen_ren.gpmc_oen_ren MODE0 | OUTPUT */
                    0x098 0x08  /* gpmc_wen.gpmc_wen MODE0 | OUTPUT */
                    0x09C 0x08  /* gpmc_ben0_cle.gpmc_ben0_cle MODE0 | OUTPUT */
                    0x078 0x08  /* gpmc_ben1_cle.gpmc_ben1_cle MODE0 | OUTPUT */
                >;
            };

            spi1_pins: pinmux_spi1_pins {
                pinctrl-single,pins = <
                    0x198  0x23 /* Mode 3, Pull-Down, RxActive */
                    0x190  0x23 /* Mode 3, Pull-Down, RxActive */
                >;
            };
        };
    }; /* End of Fragment@0 (am33xx_pinmux) */

    fragment@1 {
        target = <&gpmc>;
        depth = <1>;    /* only create devices on depth 1 */
        status = "okay";

        /* stupid warnings */
        #address-cells = <1>;
        #size-cells = <1>;

        __overlay__ {

            status = "okay";
            #address-cells = <2>;
            #size-cells = <1>;
            pinctrl-names = "default";
            pinctrl-0 = <&gpmc_pins>;
            /* chip select ranges */
            ranges = <1 0 0x01000000 0x1000000>;

            nor {
                compatible = "logibone";
                status = "okay";

                /*reset = <&rstctl 0 0>;*/
                reset-names = "eMMC_RSTn-LOGIBONE";

                reg = <1 0 0x01000000>; /*CSn1*/

                bank-width = <2>;               /* GPMC_CONFIG1_DEVICESIZE(1) */

                gpmc,burst-write;
                gpmc,burst-read;
                /*gpmc,burst-wrap;*/
                gpmc,sync-read;                 /* GPMC_CONFIG1_READTYPE_ASYNC */
                gpmc,sync-write;                /* GPMC_CONFIG1_WRITETYPE_ASYNC */
                gpmc,clk-activation-ns = <0>;   /* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
                gpmc,burst-length = <16>;       /* GPMC_CONFIG1_PAGE_LEN(2) */
                gpmc,mux-add-data = <1>;        /* GPMC_CONFIG1_MUXTYPE(1) */

                /* CONFIG2 */
                gpmc,sync-clk-ps = <20000>;
                gpmc,cs-on-ns = <0>;
                gpmc,cs-rd-off-ns = <160>;
                gpmc,cs-wr-off-ns = <80>;

                /* CONFIG3 */
                gpmc,adv-aadmux-on-ns = <0>;
                gpmc,adv-aadmux-rd-off-ns = <20>;
                gpmc,adv-aadmux-wr-off-ns = <20>;
                gpmc,adv-on-ns = <40>;
                gpmc,adv-rd-off-ns = <60>;
                gpmc,adv-wr-off-ns = <60>;

                /* CONFIG4 */
                gpmc,we-on-ns = <60>;
                gpmc,we-off-ns = <80>;
                gpmc,oe-aadmux-on-ns = <0>;
                gpmc,oe-aadmux-off-ns = <20>;
                gpmc,oe-on-ns = <60>;
                gpmc,oe-off-ns = <160>;

                /* CONFIG 5 */
                gpmc,page-burst-access-ns = <20>;
                gpmc,access-ns = <140>;
                gpmc,rd-cycle-ns = <180>;
                gpmc,wr-cycle-ns = <100>;

                /* CONFIG 6 */
                gpmc,wr-access-ns = <70>;
                gpmc,wr-data-mux-bus-ns = <60>;
                gpmc,bus-turnaround-ns = <40>;              /* CONFIG6:3:0 = 4 */
                /*gpmc,cycle2cycle-samecsen;*/          /* CONFIG6:7 = 1 */
                /*gpmc,cycle2cycle-delay-ns = <40>;*/   /* CONFIG6:11:8 = 4 */
                gpmc,device-width = <2>;  /* 16-bit width */

                /* not using dma engine yet, but we can get the channel number here */
                dmas = <&edma 20>;
                dma-names = "rxtx";
            };
        };
    }; /* End of Fragment@1 (gpmc) */

    fragment@2 {
        target = <&spi1>;

        __overlay__ {

            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&spi1_pins>;

            spidev2: spi@0 {
                compatible = "spidev";
                reg = <0>;
                spi-max-frequency = <16000000>;
                spi-cpha;
            };

            spidev3: spi@1 {
                compatible = "spidev";
                reg = <1>;
                spi-max-frequency = <16000000>;
            };
        };
    }; /* End of Fragment@2 (spi1) */

};

It is configured in mux(AAD) mode. You can find the kernel patch in my forked repository: https://github.com/jcdevel/bb-kernel/tree/am33x-v4.1 Or you can change the mux configuration to AD: gpmc,mux-add-data = <2>;

I hope it helps.

QuickJack commented 8 years ago

The nor section looks very interesting. There are lot's of additinal parameters. What is the relevant kernel patch? Why isn't it included in the official bb-kernel?

My Logibone is at revision RA2. I do not own an R1. Also I am not using Jonathan's new concept of having a seperate configuration tool. Instead I am using the previous concept of using dd on /dev/logibone to configure the FPGA. It's nice to be able to use SPI in the new concept, but I don't want to use/maintain a separate configuration utility. This should explain some of the differences in my .dts file. I guess the relevant changes are in the nor section.

QuickJack commented 8 years ago

@jcdevel The GPMC_WEN pin is now asserted using the new nor section. This is a first step into the right direction. I am using the original 4.1.17-bone-rt-r19 kernel. However, my connected hardware doesn't work as expected. This means that the timings have changed significantly.

I suggest to use the new PREEMPT_RT capable kernel. A serious embedded application will need some kind of preemption. So this is the kernel to go.

jcdevel commented 8 years ago

@QuickJack The kernel patch allows to configure the GPMC bus in mux(AAD) mode and provide the first assertion/deassertion times for the high part of the address from the DT. I implemented it because I found the 64K memory space quite limiting. I did not send the patch to the official bb-kernel because I wrote it as a prove of concept and I do not know if it presents the quality to be merged upstream, but if RobertCNelson approves, I am more than happy to send it.

Regarding the timings, I obtained them empirically using the gpmc_wishbone_wrapper_aad module from fpga-logi/logi-hard. GPMC clock is 50MHz and Wishbone clock is 100 MHz. You might need to tweak the timings for your project (and also the burst capability).

I tried the RT kernel a few weeks ago and it worked as well. I am using the normal kernel because I like to focus on one thing at a time :-)

QuickJack commented 8 years ago

You have set mux-add-data = <1> which activates address-address-data multiplexing mode. This enables 32 bit addressing which seems nice at first. But my main concern with the Logibone is it's performance. Using 32 bit addressing means we would have 3 instead of 2 cycles because the actual bus width is only 16 bits. This would result in an additional decrease in performance.

The different addressing scheme explains, why my hardware didn't respond as expected. I am using the original gpmc_wishbone_wrapper. After changing mux-add-data back to 2 basic things are working again.

The problem with my device tree seems to be solved by some of the additional entries in the nor section. You are using several parameters which are not documented under https://www.kernel.org/doc/Documentation/devicetree/bindings/bus/ti-gpmc.txt. Do you have access to a more complete documentation on this stuff?

What I want to do, is to create a new .dts file for the new Kernel that enables 100% compatibility to the combination of Kernel 3.8.13+old .dts file. I don't want to start playing around with settings I don't understand.

jcdevel commented 8 years ago

Taking a quick look, it seems the only difference in the nor section (other than the mux-add-data) is the missing device-width parameter in your file (I guess your camera section is the equivalent of my nor section, right?). I can't see those lot's of additional parameters you mentioned. Actually, both files look quite similar. I think the reason your dts was not working might be the missing status = "okay"; in the gpmc fragment.

I do not have any extra documentation, other than the am335x datasheet and the gpmc driver sources. As you mentioned, the ti-gpmc.txt file is missing some details, but you can figure them out from the source code.

As you pointed out, the mux mode is a trade-off between addressing space and access time. For my application, I needed more addressing space than performance. I do not think a single dts can fill all the possibilities the Logibone can offer, but I agree that for most applications a default dts should be enough.

jcdevel commented 8 years ago

@QuickJack BTW, the GPMC driver in kernel v4.1.x ignores all child nodes in the DT whose name is not "nand", "onenand", "ethernet", "nor" or "uart" (see function gpmc_probe_dt() in drivers/memory/omap-gpmc.c. How did you get it working with the "camera" node? Are you using a patched kernel?

QuickJack commented 8 years ago

@jcdevel You are absolutely right that it is impossible to have a perfect single setup for the Logibone that fits all needs.

Many thanks for your hint to look at the kernel sources of the gpmc driver. That clearly shows the root problem. The source code has been changed several times since 3.8.13 as follows:

3.8 gpmc_probe_dt() does not exist 3.9 only "nand" and "onenand" is accepted 3.10-4.1 it's working as you described it 4.2-4.4 "nand", "onenand" and all other strings are accepted

In the test that worked for me I already had renamed the "camera" section to "nor". This is the single relevant part that prevents the original .dts file from activating the gpmc bus because the complete "camera" section is simply ignored.

jcdevel commented 8 years ago

No problem. I also struggled at first to get it working. The documentation is not very useful, so I decided to look at the sources directly.

On a different topic, after some investigation I discovered why your Logibone kernel module does not build with the Beagleboard Kernel v4.1. The resulting kernel from bb-kernel 4.1 differs from the Beagleboard kernel. I have been trying to bring all the pieces together, but it really blows my mind. Some patches in the bb-kernel repository have been already applied to the Beagleboard kernel, some others might be missing, but since all patches are either cherry-picked, manually applied or rebased, it is nearly impossible to track them down using basic git commands. Then there are merges from TI's repository into the Beagleboard kernel, or patches for the Cape Manager, which I do not really know if they are present in this repository. For someone who is not an expert in git (like me), it looks a bit chaotic.

Could someone shed some light on the development flow for the Beagleboard (Beaglebone) kernel patches? Is there a Github repository which could be considered as the "official" repository for the Beaglebone?

Many thanks.

RobertCNelson commented 8 years ago

So for beagleboard.org, we decided to use ti's staging kernel which is:

mainline + ti.com's + beagleboard's sauce..

the bb-kernel kernel = mainline + cherry pick's from ti.com branch ^ + beagleboard sauce..

Regards,

QuickJack commented 8 years ago

According to http://valentfx.com/wiki/index.php?title=LOGI_Bone_User_Manual#Update_Kernel the official kernel to use for the Logibone is the bb-kernel. I did not test any other kernel so far.

I will provide the fixes to make the Logibone ready for the 4.1.x branches soon.

QuickJack commented 8 years ago

The issue was basically caused by an incorrect .dts file. Using the updated .dts file https://github.com/QuickJack/logi-kernel/blob/master/beaglebone-black/logibone_ra2/BB-BONE-LOGIBONE-00A3.dts the Logibone cape should work as expected. I also updated the .dts files for other hw revisions of the cape.

I think this issue can be closed.