Add cpufeatures support for risc-v

[come-maiz]

I'm trying to build the lighthouse ethereum client in a risc-v unmatched board, and it fails with:

Compiling cpufeatures v0.2.12
error: This crate works only on `aarch64`, `loongarch64`, `x86`, and `x86-64` targets.
   --> /home/come-maiz/.cargo/registry/src/index.crates.io-6f17d22bba15001f/cpufeatures-0.2.12/src/lib.rs:152:1
    |
152 | compile_error!("This crate works only on `aarch64`, `loongarch64`, `x86`, and `x86-64` targets.");
    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

> uname -a
Linux ubuntu 6.8.0-31-generic #31.1-Ubuntu SMP PREEMPT_DYNAMIC Sun Apr 21 01:12:53 UTC 2024 riscv64 riscv64 riscv64 GNU/Linux

Please add support for the risc-v architecture.

[tarcieri]

I think the culprit in your project is the ethereum_hashing crate, which is unconditionally linking cpufeatures, but only actually using it on x86_64: https://github.com/sigp/ethereum_hashing/blob/b6b5ff2/Cargo.toml#L15

See here for usage: https://github.com/sigp/ethereum_hashing/blob/b6b5ff2d8db972ee6453a710e82aee3c638d5d82/src/lib.rs#L130

The real solution to your immediate problem is to open an issue on the ethereum_hashing crate and request they gate their usage of cpufeatures to x86_64 targets, similar to this (but removing the ARM CPUs): https://github.com/RustCrypto/block-ciphers/blob/2c3de88/aes/Cargo.toml#L20

We can leave this issue open to discuss prospective RISC-V support, but my understanding is it would require complex OS interactions similar to ARM because the runtime CPU feature detection instructions are protected.

[come-maiz]

Thanks for all the details @tarcieri. I think we will have it fixed in lighthouse soon :)

I have access to a few riscv boards, so with patience and guidance I can contribute adding support in cpufeatures. I'll start by studying more about these boards.

[newpavlov]

IIUC you have to use the riscv_hwprobe syscall for this. Currently it's not exposed in libc, so you have to use raw asm!-based code for calling it. Obviously, it will be a Linux-only solution. Number of exposed extensions is quite small, so I am not sure it's worth to bother with it at the current moment.

[lazyprogrammerio]

IIUC you have to use the riscv_hwprobe syscall for this. Currently it's not exposed in libc, so you have to use raw asm!-based code for calling it. Obviously, it will be a Linux-only solution. Number of exposed extensions is quite small, so I am not sure it's worth to bother with it at the current moment.

https://github.com/rust-lang/libc/blob/main/src/unix/linux_like/linux/gnu/b64/riscv64/mod.rs#L549C11-L549C29 seems that it is already being exposed.