Closed Ernegien closed 3 years ago
Ryzee119
commented
4 years ago Havent had a chance to test it yet but changes make sense to me.
nit: tabs and spaces. Looks like I used spaces, so some of the indentation is a bit messed up.
Also should we have COUNT <= 7; here:
Ernegien
commented
4 years ago Yeah, that's a pretty big screw-up, good catch. Luckily that addition didn't tip the boat and things still fit 😄 Will hopefully fix that and the spaces 🤢 later tonight.
haxar
commented
3 years ago Oh hi, didn't realize this PR would be merged until now. I've been lacking time to work on projects again due to obvious events. I already had tackled this problem without realizing that @Ernegien had a PR open for this.
Just need to point out a few things in the VHDL regarding peripheral (SuperIO) support with OpenXenium on the same LPC bus:
LPC_ADDRESS width check for IO read/write transactions should be 16 bits wide & not 8 bits (i.e. comparison should be LPC_ADDRESS(15 DOWNTO 0) = XENIUM_00E{E,F} & not with LPC_ADDRESS(7 DOWNTO 0)), otherwise the OX will respond at any high byte with matching low byte IO address (0xXXe{e,f}).XENIUM_00E{E,F} constants in the VHDL at 16 bits to do the comparison (apparently doesn't consume any more macrocells if the comparison is either 1 bit or 16 bits), best implemented with my version in the ADDRESS state.WRITE_DATA{0,1} states as they were (preferring no hack to work around the lack of macrocells).
I believe this is as feature-complete as current master with additional safeguards against polluting non-Xenium IO transactions. For example, this now supports running my serial adapter alongside OpenXenium.