This is a pull request to incorporate adjusts made to the holes on the PCB to better align. I also changed the CPLD code to use by default the first half of the flash if the PCB is built without the switch. Also adjusted the README to mention CPLD instead of FPGA. This board doesn't have an FPGA.
S0urceror
commented
1 year ago
This is a pull request to incorporate adjusts made to the holes on the PCB to better align. I also changed the CPLD code to use by default the first half of the flash if the PCB is built without the switch. Also adjusted the README to mention CPLD instead of FPGA. This board doesn't have an FPGA.