Zvector E6 Instructions

[JamesWekel]

Fish,

I've created a new branch with mcisho's ieee.c and zvector.c updates (sharevfp branch, commit b3c07cd) and my updates for zvector E6 instructions. Using Bill's hercules-helper, this branch compiles on both windows and Linux.

Still appreciate your comments,

Jim

[JamesWekel]

Fish:

• Fixed the typo ( thanks to my instructor :-) which is the primary reason for my changes being pull requests!).

Questionable code: opcode.c, line 1598: function execute_opcode_e6xx__xx: Do you REALLY mean inst[5]?? Shouldn't it be inst[1] like the others??

• As far as I can see, this is the one occurrence where the second byte of the instruction opcode depends on the architecture. For S370, the instructions are e6xx (ECPSVM assists) and for the Z/Architecture, E6 vector the instructions are e6____xx. That's the reason I named the function 'execute_opcode_e6xx__xx' as the xx could be in different bytes depending on the architecture.

My 'unpublishable' test seems to be executing E6 vector instructions and VM Community Edition ipl's (which has ECPSVM YES in the config file) so I hope it is executing the ecpsvm defined instructions.

A major update to zvector2.c is next to use decNumber for 62 digit arithmetic. I'm sure glad it is already part of Hercules!! Why 62 digit arithmetic? VECTOR MULTIPLY AND SHIFT DECIMAL instruction can multiple two 31 digit numbers, shift the product right up to 31 digits, and store rightmost 'n' digits to a register.

Thanks again for you review.

Jim

[Fish-Git]

Merged!