SI-RISCV / e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
https://github.com/riscv-mcu/e203_hbirdv2
Apache License 2.0
2.6k stars 1k forks source link

Define CSR Address width #30

Open howard0su opened 5 years ago

howard0su commented 5 years ago

Add a define for the address width and replace the hardcoded number with it.

Also fix the width on EAI CSR registers.