Fix conditional operator in e203_exu_alu_muldiv

SI-RISCV / e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

https://github.com/riscv-mcu/e203_hbirdv2

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Fix conditional operator in e203_exu_alu_muldiv #47

Open sylwpro opened 4 years ago

sylwpro commented 4 years ago

Expressions in conditional operator are not self-determined. Unsigned type is propagated to all operands of the expression. Added $signed to prevent it.