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SI-RISCV / e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
https://github.com/riscv-mcu/e203_hbirdv2
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Where is the waveform file ? (.vcd) #50

Closed jasonlee1001 closed 3 years ago

jasonlee1001 commented 3 years ago

Hi,

I did the steps as manual: $ make install $ make compile $ make run_test It runs OK and finally show "PASS", but I can't find the ".vcd" waveform file. The message shows "dumping is suppressed." , Why ?

ps: I use iverilog V11.0

jason@dell:~/work/e200_opensource/vsim$ make run_test ... ... TESTCASE= /home/jason/work/e200_opensource/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add

VCD info: dumping is suppressed. ITCM 0x00: 340510730001aa0d ITCM 0x01: ff85051300002517 ITCM 0x02: 01f5222301e52023 ITCM 0x03: 040f416334202f73 ITCM 0x04: 4fa507ff02634fa1 ITCM 0x05: 0c634fad05ff0f63 ITCM 0x06: 0bff05634f8505ff ITCM 0x07: 4f9d0dff00634f95 ITCM 0x16: 2f03f52505130000 ITCM 0x20: 2f8300052f03f065

jasonlee1001 commented 3 years ago

I found the solution. remove "-none" after vvp command, then the vcd file can be generated. The message will show: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! TESTCASE= /home/jason/work/e200_opensource/vsim/run/../../riscv-tools/riscv-tests /isa/generated/rv32ui-p-add VCD info: dumpfile testcase.vcd opened for output. ITCM 0x00: 340510730001aa0d ......