This PR fixes the execution of ALU instructions, apart from ADD and ADDi it seems that the rest of instructions were never ported to the VLIW machine. For the fix, I refactored the runOperation to look more similar to the Superescalar implementation, which doesn't use a problematic switch case for opcodes (see #71). Also, I ported the shift functional test to the VLIW, so more type of instructions are tested to avoid having the same issue in the future (Is this regression testing?).
This PR fixes the execution of ALU instructions, apart from ADD and ADDi it seems that the rest of instructions were never ported to the VLIW machine. For the fix, I refactored the runOperation to look more similar to the Superescalar implementation, which doesn't use a problematic switch case for opcodes (see #71). Also, I ported the
shiftfunctional test to the VLIW, so more type of instructions are tested to avoid having the same issue in the future (Is this regression testing?).Closes #163