STEllAR-GROUP / hpx

The C++ Standard Library for Parallelism and Concurrency
https://hpx.stellar-group.org
Boost Software License 1.0
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Add vectorization to the par_vec (aka par_unseq) implementations of the parallel algorithms #2271

Open brycelelbach opened 8 years ago

brycelelbach commented 8 years ago

The par_vec (aka par_unseq) policy allows interleaving of element access functions, e.g. it is safe to the iterations of the algorithm.

Explicit engagement of compiler vectorizers through pragmas is probably the best way to ensure this occurs (e.g. #pragma simd, #pragma omp simd).

I will probably take a look into doing this myself while preparing my CppCon talk on parallel algorithms.

diehlpk commented 7 years ago

@brycelelbach @hkaiser Could you please add a project description here https://github.com/STEllAR-GROUP/hpx/wiki/GSoC-2017-Project-Ideas

Johan511 commented 1 year ago

I am interested in working on this project. I have seen that in the previous PRs we have added openMP pragmas for vectorization and parallelisation of a loop. Can someone guide me on how I can start out with working on this issue?

hkaiser commented 1 year ago

I am interested in working on this project. I have seen that in the previous PRs we have added openMP pragmas for vectorization and parallelisation of a loop. Can someone guide me on how I can start out with working on this issue?

Yes, we have implemented this for the first batch of algorithms. There are still algorithms left that have not been touched, though. Also, we would need a thorough performance analysis of the existing implementation, combined with improvements, if needed.

Johan511 commented 1 year ago

par_unseq implementation for algorithms, checking for all (work under progress)

trkk28097402 commented 4 months ago

Hello @hkaiser , I am interest in this topic on gsoc24 ,I have a qeustion. Is this restricted to only use the #pragma omp simd to vectorize or using something like m128d, m256d, some SIMD instructions are unreadable.

hkaiser commented 4 months ago

Hello @hkaiser , I am interest in this topic on gsoc24 ,I have a qeustion. Is this restricted to only use the #pragma omp simd to vectorize or using something like m128d, m256d, some SIMD instructions are unreadable.

Everything is possible, I guess - as long as it is portable across architectures (beyond x86), at least in the long run.