System clock configuration issue in STM32H573I-DK OEMiROT_Boot sample project

[CuriousSaman]

Hello, It seems that there is an issue in the PLL1M configuration in _Projects/STM32H573I-DK/Applications/ROT/OEMiROT_Boot/Src/systemstm32h5xx.c file SetSysClock() function. RCC_PLL1CFGR_PLL1M_Pos was used as the value. https://github.com/STMicroelectronics/STM32CubeH5/blob/3d723b2467cdb13c2d780ceaa583b269680b67a4/Projects/STM32H573I-DK/Applications/ROT/OEMiROT_Boot/Src/system_stm32h5xx.c#L298

Also, I think the values for reaching 250MHz should be like this:

• PLLM: 4 (RCC_PLL1CFGR_PLL1M_Pos will expand to 8)
• PLLN: 31 (it's 60 in the current code)
• PLLP: 2
• PLLQ: 2
• PLLR: 2
• PLLFRACN: 2048

Screenshot

Furthermore, it might be better to use: _RCC_PLL1_VCORANGEWIDE instead of _RCCPLL1VCOWIDE _RCC_PLL1_VCIRANGE2 instead of _RCC_PLL1CFGR_PLL1SRC1 _RCC_SYSCLKSOURCEPLLCLK instead of _(RCC_CFGR1_SW_1 | RCC_CFGR1_SW0)

https://github.com/STMicroelectronics/STM32CubeH5/blob/3d723b2467cdb13c2d780ceaa583b269680b67a4/Projects/STM32H573I-DK/Applications/ROT/OEMiROT_Boot/Src/system_stm32h5xx.c#L297

[HBOSTM]

ST Internal Reference: 158775