Closed savinz closed 3 years ago
Hi @savinz,
Thank you for this report. However, this is rather a Cube MX related issue and not directly related to the firmware published in this repository. Please submit it to the ST Community, in the dedicated section. There you shall find people who will address your request and whom you will hopefully find a solution with.
Now, as this issue is not directly related to some software component published within this repository (CMSIS, HAL, BSP, etc.) but rather to our ecosystem (namely the Cube MX tool), please allow me to close it.
Thank you for your contribution. We are looking forward to reading from you again.
With regards,
Hi,
The Extended PWR HAL driver - description of HAL_PWREx_ConfigSupply() and the STM32H745/755 reference manual (RM0399, chapter 7.4.1 System supply configuration) state:
On boards I could test with - including NUCLEO-H755ZI-Q with default jumper/bridges setting (Supply config 2 - Internal SMPS only) ACTVOSRDY is 0 after cold boot and remains 0 untill power configuration is set with HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY).
The default project code generated by CubeMX for NUCLEO-H755ZI-Q does plenty of write accesses to AXI RAM (setting up .data, .bss sections and stack usage) before power supply is configured. The AXI RAM is written to while voltage levels are invalid (according to ACTVOSRDY bit).
Could you please clarify the correct use of HAL_PWREx_ConfigSupply() in regards to the above warning. Which RAMs must not be written to while ACTVOSRDY is 0 (voltage levels are invalid) before the first call to HAL_PWREx_ConfigSupply() after cold boot?
Thanks and best regards, Savin