Closed escherstair closed 1 year ago
I think that the documentation of iis3dwb_fifo_status_get has a little typo. After commit f19da2b it reads both FIFO_STATUS1 and FIFO_STATUS2 registers https://github.com/STMicroelectronics/iis3dwb-pid/blob/b85e3d23bbc5806011dd202a528308099cb24204/iis3dwb_reg.c#L3129 and combines their content into the struct iis3dwb_fifo_status_t.
iis3dwb_fifo_status_get
FIFO_STATUS1
FIFO_STATUS2
iis3dwb_fifo_status_t
I suggest to change https://github.com/STMicroelectronics/iis3dwb-pid/blob/b85e3d23bbc5806011dd202a528308099cb24204/iis3dwb_reg.c#L3118 into * @param val Registers FIFO_STATUS1 and FIFO_STATUS2
* @param val Registers FIFO_STATUS1 and FIFO_STATUS2
Fixed with commit https://github.com/STMicroelectronics/iis3dwb-pid/commit/6c2665bf0c7a632cc38d30a5c1a253cf6b873d6d
I think that the documentation of
iis3dwb_fifo_status_get
has a little typo. After commit f19da2b it reads bothFIFO_STATUS1
andFIFO_STATUS2
registers https://github.com/STMicroelectronics/iis3dwb-pid/blob/b85e3d23bbc5806011dd202a528308099cb24204/iis3dwb_reg.c#L3129 and combines their content into the structiis3dwb_fifo_status_t
.I suggest to change https://github.com/STMicroelectronics/iis3dwb-pid/blob/b85e3d23bbc5806011dd202a528308099cb24204/iis3dwb_reg.c#L3118 into
* @param val Registers FIFO_STATUS1 and FIFO_STATUS2