STMicroelectronics / stm32h7xx_hal_driver

Provides the STM32Cube MCU Component "hal_driver" of the STM32H7 series.
BSD 3-Clause "New" or "Revised" License
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ETH Rx Tailpointer calculation wrong #61

Open Florian-Fischer-InMach opened 2 weeks ago

Florian-Fischer-InMach commented 2 weeks ago

Caution The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the ST Community/STM32 MCUs forum

Describe the set-up Custom Board with STM32H743XIHX

Describe the bug In v1.11.3 in the function ETH_UpdateDescriptor the calculation of the tailidx/DMACRDTPR is wrong. Becaus of this the HAL_ETH_ErrorCallback is reached in my application

The tail pointer should point to the last built/updated descriptor.

v1.11.0 points to NULL -- completly wrong v1.11.3 tried to fix it but points to 2 after the last updated descriptor

ASEHSTM commented 2 weeks ago

Hello @Florian-Fischer-InMach,

To assist you more effectively with the DMA pointer issue you're experiencing, could you please provide us with the following configuration details of your custom board?

With Regards,

Florian-Fischer-InMach commented 1 week ago

Hello I use this code to configure the MPU. I use some linker script magic to place dma stuff at begin of each ram section(d1/d2/d3/external) and extended to statisfy the power of 2 requierment of mpu region size The DMA descriptors end up in uncachable dma region at begin of d2 ram.

What do you mean by custom setting to DMA controller? For ETH stuff i use the HAL functions. No custom settings.

For adc, spi and uart DMA1 is used

/**
 * Set the whole memory to cacheable and set  overlay region for dma to uncacheable
 */
static void set_region ( const uint8_t region_number, const uint32_t base_adress, const uint32_t memeory_size, const uint32_t dma_size )
{
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
  /*
   * Initializes Ram as Write-back, write and read allocate   -> tex 1  + c + b + no s
   */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.Number = region_number;
  MPU_InitStruct.BaseAddress = base_adress;
  MPU_InitStruct.Size = calc_mpu_region_size ( memeory_size );
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.IsShareable  = MPU_ACCESS_NOT_SHAREABLE;
  MPU_InitStruct.IsCacheable  = MPU_ACCESS_CACHEABLE;
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
`
  /*
   * Initializes overlay of dma part as shareable and not cachable -> tex 1  + no c + no b + s
   */
  volatile uint32_t volatile_dma_size = dma_size;//workaround compiler bug. It assumes a adress is never 0 and optimises the if away
  if ( volatile_dma_size > 0 )
  {
    MPU_InitStruct.Number = region_number + 1;
    MPU_InitStruct.BaseAddress = base_adress;
    MPU_InitStruct.Size = calc_mpu_region_size ( dma_size );
    MPU_InitStruct.IsShareable  = MPU_ACCESS_SHAREABLE;
    MPU_InitStruct.IsCacheable  = MPU_ACCESS_NOT_CACHEABLE;
    MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

    HAL_MPU_ConfigRegion(&MPU_InitStruct);
  }
}