SamCoVT / TaliForth2

A Subroutine Threaded Code (STC) ANSI-like Forth for the 65c02
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Is it possible to run in RAM? #11

Closed jfoucher closed 1 year ago

jfoucher commented 1 year ago

Hi, I'd like to know if it is possible to configure TaliForth to copy itself from ROM to RAM on reset, like what can be achieved with ca65 segments?

For example I can tell ca65 to put the code in ROM but create the labels as if it were in RAM, so that the reset routine can copy everything to RAM and run it from there. Is there anything similar in tass64?

Thanks

SamCoVT commented 1 year ago

Hi @jfoucher, I'm not aware of a way to do this directly with tass64 and have it copy over on startup automatically. I think you would need to assemble it using the RAM locations you want to use, then arrange for it to be stored in ROM at a known location and you would need to copy it over before jumping to the kernel_init (from the platform file) address. You can get tass64 to generate a bin file less than 32K if that helps.

You can take a look at the steckschwein platform file - that project is designed to generate a .prg file that is loaded from storage into RAM. The .prg file format has the address it should be loaded into as the first two bytes and then the binary data after that. You'll note that the stechschwein platform file does not have the interrupt vectors at the end, so tass64 will stop generating output when it reaches the end of TaliForth. This is true even when generating a .bin file (rather than a .prg file) using that platform file, and that may be a starting point for you.

Unless you have wait states on your ROM and want extra speed, or have banked memory, or want to load from storage, there usually isn't any advantage to moving Tali into RAM. If you are able to run Tali from ROM, then all of the available RAM is usable for new words that you create. -SamCoVT

SamCoVT commented 1 year ago

Closing this issue - if you need more assistance, feel free to open a new issue.