SauravMaheshkar / verilog-template

❄️ Template for Verilog Projects using iverilog and gtkwave (nix devShell supported)
MIT License
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can you add an example project? #6

Open Kreijstal opened 2 months ago

Kreijstal commented 2 months ago

To see how this template is used.

SauravMaheshkar commented 2 months ago

Hey @Kreijstal thanks for your interest in using this template. I've been considering creating a very simple example project using the template. I'll probably work on creating a very simple RISC-V CPU.

I have other projects going on atm but I'll keep you posted when I end up creating that project.