<!-- copy/paste the output of `uname -a; lsb_release -a` below -->
Linux c111 5.4.0-150-generic #167~18.04.1-Ubuntu SMP Wed May 24 00:51:42 UTC 2023 x86_64 GNU/Linux
LSB Version: core-9.20170808ubuntu1-noarch:printing-9.20170808ubuntu1-noarch:security-9.20170808ubuntu1-noarch
Distributor ID: Ubuntu
Description: Ubuntu 18.04.6 LTS
Release: 18.04
Codename: bionic
Other Setup
Current Behavior
Hello. Thank you so much for your open source work.
I'm trying to run this work on a local Xilinx U280, which makes me have to port your work to firesim 1.17.1 with chipyard 1.9.1. But when I try to firesim buildbitstream, I encountered the following error(The error appears to be due to NoC's inability to recognize the serdesser[i]):
[localhost] out: Picked up JAVA_TOOL_OPTIONS: -Xmx16G -Xss8M -Djava.io.tmpdir=/mnt/eda2/wangzy/proj/AuRORA/firesim/sim/.java_tmp
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 0 is a gemmini.Gemmini@637791d
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 1 is a gemmini.Gemmini@60f77af
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 2 is a gemmini.Gemmini@2574a9e3
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 3 is a gemmini.Gemmini@18b6d3c1
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 4 is a gemmini.Gemmini@422ab737
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 5 is a gemmini.Gemmini@3fe512d2
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 6 is a gemmini.Gemmini@3fde8f7c
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 7 is a gemmini.Gemmini@11d86b9d
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 8 is a gemmini.Gemmini@6dce59e
[localhost] out: (3,List(UInt<7>(123)))
[localhost] out: ReRoCC Manager id 9 is a gemmini.Gemmini@11381415
[localhost] out: wzy#######TLNoC
[localhost] out: Constellation: TLNoC TLNoC inwards mapping:
[localhost] out: 0 <- blkdev-tracker0[0],serial-tl[0]|
[localhost] out: 20 <- Core 0 DCache[0],Core 0 DCache MMIO[0],cacheflusher[0],Core 0 ICache[0]|
[localhost] out: 23 <- Core 1 DCache[0],Core 1 DCache MMIO[0],cacheflusher[0],Core 1 ICache[0]|
[localhost] out: 24 <- Core 2 DCache[0],Core 2 DCache MMIO[0],cacheflusher[0],Core 2 ICache[0]|
[localhost] out: 25 <- Core 3 DCache[0],Core 3 DCache MMIO[0],cacheflusher[0],Core 3 ICache[0]|
[localhost] out: 26 <- Core 4 DCache[0],Core 4 DCache MMIO[0],cacheflusher[0],Core 4 ICache[0]|
[localhost] out: 8 <- stream-reader[0],stream-writer[0],ReRoCC 0 DCache[0],ReRoCC 0 DCache MMIO[0]|
[localhost] out: 9 <- stream-reader[0],stream-writer[0],ReRoCC 1 DCache[0],ReRoCC 1 DCache MMIO[0]|
[localhost] out: 10 <- stream-reader[0],stream-writer[0],ReRoCC 2 DCache[0],ReRoCC 2 DCache MMIO[0]|
[localhost] out: 11 <- stream-reader[0],stream-writer[0],ReRoCC 3 DCache[0],ReRoCC 3 DCache MMIO[0]|
[localhost] out: 16 <- stream-reader[0],stream-writer[0],ReRoCC 4 DCache[0],ReRoCC 4 DCache MMIO[0]|
[localhost] out: 17 <- stream-reader[0],stream-writer[0],ReRoCC 5 DCache[0],ReRoCC 5 DCache MMIO[0]|
[localhost] out: 18 <- stream-reader[0],stream-writer[0],ReRoCC 6 DCache[0],ReRoCC 6 DCache MMIO[0]|
[localhost] out: 19 <- stream-reader[0],stream-writer[0],ReRoCC 7 DCache[0],ReRoCC 7 DCache MMIO[0]|
[localhost] out: 21 <- stream-reader[0],stream-writer[0],ReRoCC 8 DCache[0],ReRoCC 8 DCache MMIO[0]|
[localhost] out: 22 <- stream-reader[0],stream-writer[0],ReRoCC 9 DCache[0],ReRoCC 9 DCache MMIO[0]|
[localhost] out: Constellation: TLNoC TLNoC outwards mapping:
[localhost] out: 0 <- error[0],l2[0],subsystem_pbus[0],frontend[0],uart_0[0],plic[0],clint[0],bootrom[0],reset_setter[0]|
[localhost] out: 0 <- system[0]|
[localhost] out: 1 <- system[1]|
[localhost] out: 2 <- system[2]|
[localhost] out: 3 <- system[3]|
[localhost] out: X <- system[4]|
[localhost] out: X <- system[5]|
[localhost] out: X <- system[6]|
[localhost] out: X <- system[7]|
[localhost] out: X <- system[8]|
[localhost] out: X <- system[9]|
[localhost] out: X <- system[10]|
[localhost] out: X <- system[11]|
[localhost] out: Exception in thread "main" java.lang.reflect.InvocationTargetException
[localhost] out: at ... ()
[localhost] out: at freechips.rocketchip.stage.phases.PreElaboration.$anonfun$transform$1(PreElaboration.scala:36)
[localhost] out: at ... ()
[localhost] out: at ... (Stack trace trimmed to user code only. Rerun with --full-stacktrace to see the full stack trace)
[localhost] out: Caused by: java.lang.IllegalArgumentException: requirement failed
[localhost] out: at scala.Predef$.require(Predef.scala:324)
[localhost] out: at constellation.protocol.TileLinkProtocolParams.<init>(Tilelink.scala:297)
[localhost] out: at constellation.protocol.TLNoCModuleImp.protocolParams$lzycompute(Tilelink.scala:433)
[localhost] out: at constellation.protocol.TLNoCModuleImp.protocolParams(Tilelink.scala:429)
[localhost] out: at constellation.protocol.TLNoC$$anon$7.$anonfun$noc$2(Tilelink.scala:468)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at constellation.protocol.TLNoC$$anon$7.$anonfun$noc$1(Tilelink.scala:466)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at constellation.protocol.TLNoC$$anon$7.<init>(Tilelink.scala:466)
[localhost] out: at constellation.protocol.TLNoC.$anonfun$module$1(Tilelink.scala:458)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at constellation.protocol.TLNoC.module$lzycompute(Tilelink.scala:458)
[localhost] out: at constellation.protocol.TLNoC.module(Tilelink.scala:458)
[localhost] out: at constellation.protocol.TLNoC.module(Tilelink.scala:456)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$15(LazyModule.scala:334)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$14(LazyModule.scala:334)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$13(LazyModule.scala:334)
[localhost] out: at scala.Option.getOrElse(Option.scala:201)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$1(LazyModule.scala:332)
[localhost] out: at scala.collection.immutable.List.flatMap(List.scala:293)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate(LazyModule.scala:308)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate$(LazyModule.scala:305)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.instantiate(LazyModule.scala:401)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.$anonfun$x$23$2(LazyModule.scala:414)
[localhost] out: at chisel3.withClockAndReset$.apply(MultiClock.scala:26)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.$anonfun$x$23$1(LazyModule.scala:414)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursivelyProduct(package.scala:48)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.<init>(LazyModule.scala:413)
[localhost] out: at freechips.rocketchip.prci.Domain$Impl.<init>(ClockDomain.scala:11)
[localhost] out: at freechips.rocketchip.prci.Domain.$anonfun$module$1(ClockDomain.scala:10)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at freechips.rocketchip.prci.Domain.module$lzycompute(ClockDomain.scala:10)
[localhost] out: at freechips.rocketchip.prci.Domain.module(ClockDomain.scala:10)
[localhost] out: at freechips.rocketchip.prci.Domain.module(ClockDomain.scala:7)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$15(LazyModule.scala:334)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$14(LazyModule.scala:334)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$13(LazyModule.scala:334)
[localhost] out: at scala.Option.getOrElse(Option.scala:201)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$1(LazyModule.scala:332)
[localhost] out: at scala.collection.immutable.List.flatMap(List.scala:293)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate(LazyModule.scala:308)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate$(LazyModule.scala:305)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImp.instantiate(LazyModule.scala:392)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImp.$anonfun$x$22$1(LazyModule.scala:394)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursivelyProduct(package.scala:48)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImp.<init>(LazyModule.scala:394)
[localhost] out: at freechips.rocketchip.subsystem.BareSubsystemModuleImp.<init>(BaseSubsystem.scala:29)
[localhost] out: at freechips.rocketchip.subsystem.BaseSubsystemModuleImp.<init>(BaseSubsystem.scala:122)
[localhost] out: at chipyard.ChipyardSubsystemModuleImp.<init>(Subsystem.scala:124)
[localhost] out: at chipyard.ChipyardSystemModule.<init>(System.scala:48)
[localhost] out: at chipyard.DigitalTopModule.<init>(DigitalTop.scala:42)
[localhost] out: at chipyard.DigitalTop.$anonfun$module$1(DigitalTop.scala:39)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at chipyard.DigitalTop.module$lzycompute(DigitalTop.scala:39)
[localhost] out: at chipyard.DigitalTop.module(DigitalTop.scala:39)
[localhost] out: at chipyard.DigitalTop.module(DigitalTop.scala:15)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$15(LazyModule.scala:334)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$14(LazyModule.scala:334)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$13(LazyModule.scala:334)
[localhost] out: at scala.Option.getOrElse(Option.scala:201)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.$anonfun$instantiate$1(LazyModule.scala:332)
[localhost] out: at scala.collection.immutable.List.flatMap(List.scala:293)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate(LazyModule.scala:308)
[localhost] out: at freechips.rocketchip.diplomacy.LazyModuleImpLike.instantiate$(LazyModule.scala:305)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.instantiate(LazyModule.scala:401)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.$anonfun$x$23$2(LazyModule.scala:414)
[localhost] out: at chisel3.withClockAndReset$.apply(MultiClock.scala:26)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.$anonfun$x$23$1(LazyModule.scala:414)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursivelyProduct(package.scala:48)
[localhost] out: at freechips.rocketchip.diplomacy.LazyRawModuleImp.<init>(LazyModule.scala:413)
[localhost] out: at chipyard.ChipTop$$anon$1.<init>(ChipTop.scala:34)
[localhost] out: at chipyard.ChipTop.$anonfun$module$1(ChipTop.scala:34)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at chipyard.ChipTop.module$lzycompute(ChipTop.scala:34)
[localhost] out: at chipyard.ChipTop.module(ChipTop.scala:34)
[localhost] out: at chipyard.harness.HasHarnessInstantiators.$anonfun$instantiateChipTops$5(HasHarnessInstantiators.scala:82)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at chipyard.harness.HasHarnessInstantiators.$anonfun$instantiateChipTops$4(HasHarnessInstantiators.scala:82)
[localhost] out: at scala.collection.immutable.List.map(List.scala:246)
[localhost] out: at scala.collection.immutable.List.map(List.scala:79)
[localhost] out: at chipyard.harness.HasHarnessInstantiators.$anonfun$instantiateChipTops$3(HasHarnessInstantiators.scala:82)
[localhost] out: at chisel3.internal.plugin.package$.autoNameRecursively(package.scala:33)
[localhost] out: at chipyard.harness.HasHarnessInstantiators.instantiateChipTops(HasHarnessInstantiators.scala:82)
[localhost] out: at chipyard.harness.HasHarnessInstantiators.instantiateChipTops$(HasHarnessInstantiators.scala:75)
[localhost] out: at firesim.firesim.FireSim.instantiateChipTops(FireSim.scala:68)
[localhost] out: at firesim.firesim.FireSim.<init>(FireSim.scala:88)
[localhost] out: at java.base/jdk.internal.reflect.NativeConstructorAccessorImpl.newInstance0(Native Method)
[localhost] out: at java.base/jdk.internal.reflect.NativeConstructorAccessorImpl.newInstance(NativeConstructorAccessorImpl.java:77)
[localhost] out: at java.base/jdk.internal.reflect.DelegatingConstructorAccessorImpl.newInstance(DelegatingConstructorAccessorImpl.java:45)
[localhost] out: at java.base/java.lang.reflect.Constructor.newInstanceWithCaller(Constructor.java:499)
[localhost] out: at java.base/java.lang.reflect.Constructor.newInstance(Constructor.java:480)
[localhost] out: at freechips.rocketchip.stage.phases.PreElaboration.$anonfun$transform$1(PreElaboration.scala:36)
[localhost] out: at chisel3.Module$.do_apply(Module.scala:53)
[localhost] out: at chisel3.stage.phases.Elaborate.$anonfun$transform$2(Elaborate.scala:40)
[localhost] out: at chisel3.internal.Builder$.$anonfun$build$1(Builder.scala:884)
[localhost] out: at scala.util.DynamicVariable.withValue(DynamicVariable.scala:59)
[localhost] out: at chisel3.internal.Builder$.build(Builder.scala:879)
[localhost] out: at chisel3.stage.phases.Elaborate.$anonfun$transform$1(Elaborate.scala:40)
[localhost] out: at scala.collection.immutable.List.flatMap(List.scala:293)
[localhost] out: at scala.collection.immutable.List.flatMap(List.scala:79)
[localhost] out: at chisel3.stage.phases.Elaborate.transform(Elaborate.scala:28)
[localhost] out: at chisel3.stage.phases.Elaborate.transform(Elaborate.scala:21)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Translator.transform(Phase.scala:248)
[localhost] out: at firrtl.options.Translator.transform$(Phase.scala:248)
[localhost] out: at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.DependencyManager.$anonfun$transform$5(DependencyManager.scala:280)
[localhost] out: at firrtl.Utils$.time(Utils.scala:181)
[localhost] out: at firrtl.options.DependencyManager.$anonfun$transform$3(DependencyManager.scala:280)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft(LinearSeq.scala:183)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft$(LinearSeq.scala:179)
[localhost] out: at scala.collection.immutable.List.foldLeft(List.scala:79)
[localhost] out: at firrtl.options.DependencyManager.transform(DependencyManager.scala:269)
[localhost] out: at firrtl.options.DependencyManager.transform$(DependencyManager.scala:255)
[localhost] out: at firrtl.options.PhaseManager.transform(DependencyManager.scala:443)
[localhost] out: at chisel3.stage.ChiselStage.run(ChiselStage.scala:45)
[localhost] out: at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[localhost] out: at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Translator.transform(Phase.scala:248)
[localhost] out: at firrtl.options.Translator.transform$(Phase.scala:248)
[localhost] out: at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Stage.$anonfun$transform$5(Stage.scala:47)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft(LinearSeq.scala:183)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft$(LinearSeq.scala:179)
[localhost] out: at scala.collection.immutable.List.foldLeft(List.scala:79)
[localhost] out: at firrtl.options.Stage.$anonfun$transform$3(Stage.scala:47)
[localhost] out: at logger.Logger$.$anonfun$makeScope$2(Logger.scala:137)
[localhost] out: at scala.util.DynamicVariable.withValue(DynamicVariable.scala:59)
[localhost] out: at logger.Logger$.makeScope(Logger.scala:135)
[localhost] out: at firrtl.options.Stage.transform(Stage.scala:47)
[localhost] out: at firrtl.options.Stage.transform(Stage.scala:17)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Translator.transform(Phase.scala:248)
[localhost] out: at firrtl.options.Translator.transform$(Phase.scala:248)
[localhost] out: at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.DependencyManager.$anonfun$transform$5(DependencyManager.scala:280)
[localhost] out: at firrtl.Utils$.time(Utils.scala:181)
[localhost] out: at firrtl.options.DependencyManager.$anonfun$transform$3(DependencyManager.scala:280)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft(LinearSeq.scala:183)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft$(LinearSeq.scala:179)
[localhost] out: at scala.collection.immutable.List.foldLeft(List.scala:79)
[localhost] out: at firrtl.options.DependencyManager.transform(DependencyManager.scala:269)
[localhost] out: at firrtl.options.DependencyManager.transform$(DependencyManager.scala:255)
[localhost] out: at firrtl.options.PhaseManager.transform(DependencyManager.scala:443)
[localhost] out: at chisel3.stage.ChiselStage.run(ChiselStage.scala:45)
[localhost] out: at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[localhost] out: at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[localhost] out: at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Translator.transform(Phase.scala:248)
[localhost] out: at firrtl.options.Translator.transform$(Phase.scala:248)
[localhost] out: at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[localhost] out: at firrtl.options.Stage.$anonfun$transform$5(Stage.scala:47)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft(LinearSeq.scala:183)
[localhost] out: at scala.collection.LinearSeqOps.foldLeft$(LinearSeq.scala:179)
[localhost] out: at scala.collection.immutable.List.foldLeft(List.scala:79)
[localhost] out: at firrtl.options.Stage.$anonfun$transform$3(Stage.scala:47)
[localhost] out: at logger.Logger$.$anonfun$makeScope$2(Logger.scala:137)
[localhost] out: at scala.util.DynamicVariable.withValue(DynamicVariable.scala:59)
[localhost] out: at logger.Logger$.makeScope(Logger.scala:135)
[localhost] out: at firrtl.options.Stage.transform(Stage.scala:47)
[localhost] out: at firrtl.options.Stage.execute(Stage.scala:58)
[localhost] out: at firrtl.options.StageMain.main(Stage.scala:71)
[localhost] out: at chipyard.Generator.main(Generator.scala)
Expected Behavior
..
Other Information
I took the following steps to port the project:
Clone and setup firesim 1.17
generators/chipyard/rerocc is completed copy to the new version
Replace generator/gemmini completion with your gemmini-aurora-ae (including submodule software test code)
Add the Gemmini10ReRoCCOrigNoCConfig to NoCConfigs.scala
class DigitalTop(implicit p: Parameters) extends ChipyardSystem
with testchipip.CanHavePeripheryCustomBootPin // Enables optional custom boot pin
with testchipip.CanHavePeripheryBootAddrReg // Use programmable boot address register
with testchipip.CanHaveTraceIO // Enables optionally adding trace IO
with testchipip.CanHaveBankedScratchpad // Enables optionally adding a banked scratchpad
with testchipip.CanHavePeripheryBlockDevice // Enables optionally adding the block device
with testchipip.CanHavePeripheryTLSerial // Enables optionally adding the backing memory and serial adapter
with sifive.blocks.devices.i2c.HasPeripheryI2C // Enables optionally adding the sifive I2C
with sifive.blocks.devices.pwm.HasPeripheryPWM // Enables optionally adding the sifive PWM
with sifive.blocks.devices.uart.HasPeripheryUART // Enables optionally adding the sifive UART
with sifive.blocks.devices.gpio.HasPeripheryGPIO // Enables optionally adding the sifive GPIOs
with sifive.blocks.devices.spi.HasPeripherySPIFlash // Enables optionally adding the sifive SPI flash controller
with sifive.blocks.devices.spi.HasPeripherySPI // Enables optionally adding the sifive SPI port
with icenet.CanHavePeripheryIceNIC // Enables optionally adding the IceNIC for FireSim
with chipyard.example.CanHavePeripheryInitZero // Enables optionally adding the initzero example widget
with chipyard.example.CanHavePeripheryGCD // Enables optionally adding the GCD example widget
with chipyard.example.CanHavePeripheryStreamingFIR // Enables optionally adding the DSPTools FIR example widget
with chipyard.example.CanHavePeripheryStreamingPassthrough // Enables optionally adding the DSPTools streaming-passthrough example widget
with nvidia.blocks.dla.CanHavePeripheryNVDLA // Enables optionally having an NVDLA
with chipyard.clocking.HasChipyardPRCI // Use Chipyard reset/clock distribution
with fftgenerator.CanHavePeripheryFFT // Enables optionally having an MMIO-based FFT block
with constellation.soc.CanHaveGlobalNoC // Support instantiating a global NoC interconnect
with chipyard.rerocc.CanHaveReRoCCTiles // Enables remote-RoCC tiles
{
override lazy val module = new DigitalTopModule(this)
}
replace all configs to org.chipsalliance.cde.config._
add FireSimGemmini10ReRoCCOrigNoCConfig in TargetConfigs.scala
class FireSimGemmini10ReRoCCOrigNoCConfig extends Config(
new WithDefaultFireSimBridges ++
//new WithDefaultMemModel ++
new WithFireSimConfigTweaks ++
new chipyard.Gemmini10ReRoCCOrigNoCConfig)
Background Work
FireSim Version and Hash
firesim: 1.17.1-0-gb473147af
chipyard: 1.9.1-289-g336f2251
OS Setup
Linux c111 5.4.0-150-generic #167~18.04.1-Ubuntu SMP Wed May 24 00:51:42 UTC 2023 x86_64 GNU/Linux LSB Version: core-9.20170808ubuntu1-noarch:printing-9.20170808ubuntu1-noarch:security-9.20170808ubuntu1-noarch Distributor ID: Ubuntu Description: Ubuntu 18.04.6 LTS Release: 18.04 Codename: bionic
Other Setup
Current Behavior
Hello. Thank you so much for your open source work. I'm trying to run this work on a local
Xilinx U280
, which makes me have to port your work tofiresim 1.17.1
withchipyard 1.9.1
. But when I try tofiresim buildbitstream
, I encountered the following error(The error appears to be due to NoC's inability to recognize theserdesser[i]
):Expected Behavior
..
Other Information
I took the following steps to port the project:
Clone and setup
firesim 1.17
generators/chipyard/rerocc
is completed copy to the new versionReplace
generator/gemmini
completion with yourgemmini-aurora-ae
(including submodule software test code)Add the
Gemmini10ReRoCCOrigNoCConfig
toNoCConfigs.scala
add
CanHaveReRoCCTiles
toDigitalTop
replace all configs to
org.chipsalliance.cde.config._
add
FireSimGemmini10ReRoCCOrigNoCConfig
inTargetConfigs.scala
add a new recipe in the
config_build_recipes.yaml
modify gemmini dependency versions from
to
Can you give me some valuable advice? Thank you.