Change symmetric cipher interface so that multiple blocks could be submitted for en-/de-cryption at once. This would open the possibility to 1) use the VAES x86 instruction set, 2) interleave the currently proposed AES-NI instructions (AES is done in multiple rounds (up to 14) and each successive round depends on result of the previous one, but multiple blocks could be crypted in i-th round at the same time, if the CPU has more than one AES unit (they have), applicable to ECB, CTR, GCM modes and CBC, CFB decrypt modes).
MarekKnapek
commented
4 months ago
Change symmetric cipher interface so that multiple blocks could be submitted for en-/de-cryption at once. This would open the possibility to 1) use the VAES x86 instruction set, 2) interleave the currently proposed AES-NI instructions (AES is done in multiple rounds (up to 14) and each successive round depends on result of the previous one, but multiple blocks could be crypted in i-th round at the same time, if the CPU has more than one AES unit (they have), applicable to ECB, CTR, GCM modes and CBC, CFB decrypt modes).
Links: