Update FPGA timer address per hardware target

Severson-Group / AMDC-Firmware

Embedded system code (C and Verilog) which runs the AMDC Hardware

http://docs.amdc.dev/firmware

BSD 3-Clause "New" or "Revised" License

30 stars 5 forks source link

Update FPGA timer address per hardware target #251

Closed npetersen2 closed 2 years ago

npetersen2 commented 2 years ago

Closes #247

The Vivado project for REV E added a hierarchy for the control timers, so it changed the define name. It is the same timer IP block, but different name!