Generating interrupts in processor from FPGA

[npetersen2]

• [x] Triggering based on custom Verilog in FPGA
• [x] Xilinx interrupt controller configuration on C code side
• [ ] #349
• [ ] #350

[npetersen2]

@abhipriyabansal had a draft of this here: https://github.com/Severson-Group/AMDC-Firmware/pull/318

[npetersen2]

@annikaolson here is a nice tutorial on how to configure interrupts from the PL to the PS:

https://github.com/k0nze/zedboard_pl_to_ps_interrupt_example

[npetersen2]

On hold until @codecubepi finishes up the FreeRTOS codebase port.