Severson-Group / AMDC-Firmware

Embedded system code (C and Verilog) which runs the AMDC Hardware

http://docs.amdc.dev/firmware

BSD 3-Clause "New" or "Revised" License

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Incorporate synched scheduler ISR changes in new IP and drivers #334

Closed annikaolson closed 8 months ago

annikaolson commented 9 months ago

This is a sub-issue of #323

Merge changes from #318 and base on #314.

[x] Add logic to IP core that generates an interrupt based on PWM carrier
[x] Modify C code based on changes above to create outline for new sched_ISR signal coming from IP

This should provide a basis for implementing issue #335 to fully implement the interrupt generation from the FPGA.

318 has a starting point for this, but is not finished on the C code side and some functionality will likely need to be changed overall.