This will merge a rebased freertos-singlecore into a copy of the current 1.3.x main branch. The project "freertos_app_cpu0" contains a user app "vsiApp", which is used to demonstrate/test the following working features:
Custom user apps (with customisable task rates, priorities, and memory sizes)
Interaction with existing host interface (python wrapper + scripting compatibility)
AMDS (with low voltage card)
Signal injection
Yet untested features:
AMDC REV D and REV E
DAC board
Eddy current sensor
Encoder
TODO
Investigate anomalies with run time statistics, and find a way to make them useful for our purposes
Over the course of the review I plan to build upon the vsiApp (which operates with a uInverter) to include demonstrations of the yet untested features (interacting with the AMDS and other sensors). I also need to know of any other features that need to be demonstrated in order to consider this work complete.
I can also document testing procedures and results upon request.
Edit: Need to figure out timing manager + freertos integration. Also need to adjust stats to better reflect the information that the old stats would give.
This will merge a rebased freertos-singlecore into a copy of the current 1.3.x main branch. The project "freertos_app_cpu0" contains a user app "vsiApp", which is used to demonstrate/test the following working features:
Yet untested features:
TODO
Over the course of the review I plan to build upon the vsiApp (which operates with a uInverter) to include demonstrations of the yet untested features (interacting with the AMDS and other sensors). I also need to know of any other features that need to be demonstrated in order to consider this work complete.
I can also document testing procedures and results upon request.
Edit: Need to figure out timing manager + freertos integration. Also need to adjust stats to better reflect the information that the old stats would give.