Feature request: identify Pins facing the wrong way

SiEPIC / SiEPIC-Tools

Package for KLayout to add integrated optics / silicon photonics functionality (waveguides, netlist extraction, circuit simulations, etc)

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Open lukasc-ubc opened 3 months ago

lukasc-ubc commented 3 months ago

Sometimes cells have the pins facing the wrong way in a component. The Pin should be pointing outwards. It would be nice to generate an error.

Solution:

add a verification rule that checks if the first point in the PinRec path is inside the DevRec region

lukasc-ubc commented 3 months ago