Closed tamaroning closed 1 year ago
It's not 5 bits no, it is 6, like my mask, at least to my knowledge. Will research further to investigate if my understanding is correct. Will leave the issue opened
If the function is only interested in the index field of the register, then masking a 6 bit wide value is accurate. bit-31 is also readable/writable.
The VR4300 manual does note that while the index field is 6 bits wide, only the least-significant 5 bits are actually used in TLB operations (page 146). Perhaps this is where the confusion is from?
The bit mask has be confirmed via an addition to the n64-systemtest suite: https://github.com/lemmy-64/n64-systemtest/pull/57
Alright, can close this issue as its been tested as right.
Very small nit, but should this mask be 0b11111? It is also true for elsewhere index is used. https://github.com/SimoneN64/Kaizen/blob/74dccb6ac6a679acbf41b497151e08af6302b0e9/src/backend/core/interpreter/cop/cop0instructions.cpp#L35