SonalPinto / kronos

Kronos is a 3-stage in-order RISC-V RV32I_Zicsr_Zifencei core geared towards FPGA implementations
https://sonalpinto.github.io/kronos/#/
Apache License 2.0
67 stars 9 forks source link

Control-flow hijacking vulnerability: Wrong register data is used #17

Open KatCe opened 1 month ago

KatCe commented 1 month ago

Hello,

we have found a security vulnerability in the Kronos CPU where an instruction sometimes reads from the previous' instruction's input register. For example, a 'jalr' instruction may read from the previous 'add' instruction's input. If that 'add' instruction was operating on attacker-controlled data, an attacker would gain the ability to hijack the control flow.

This bug happens, when an instruction request (instr_req) is not immediately acknowledged by an instr_ack on the instruction bus interface.

Screenshot from 2024-08-20 18-28-32

As can be seen in the test output, the 'pc_last' signal is set to a value calculated from register x2 instead of x0.

The good case where the 'instr_ack' appears in the next clock cycle after each request: Screenshot from 2024-08-20 18-30-54

An example testbench can be found here: https://github.com/KatCe/kronos/tree/cf_hijack_bug_wrong_rs1/tests/cf_hijack_wrong_rs1

Thank you. Katharina