ObviousInRetrospect
commented
2 years ago ok so in addition to that million I ran another 6.3m with mTC 2.6.1 + RC2 as the master:
CRC valid
fail: 0 pass: 6367884Closed ObviousInRetrospect closed 1 year ago
ObviousInRetrospect
commented
2 years ago ok so in addition to that million I ran another 6.3m with mTC 2.6.1 + RC2 as the master:
CRC valid
fail: 0 pass: 6367884
SpenceKonde
commented
1 year ago Dear god. Okay, so I think I have your fixes in MTC for 2.6.2, and that will be ported to DxCore 1.5.0
I've noticed unreliable slave behavior in SLEEP_MODE_STANDBY (and SLEEP_MODE_POWER_DOWN). This seems to be more of an issue when transferring larger buffers. I thought guarding the sleep_cpu() call with !Wire.slaveTransactionOpen() was sufficient. The twi supports wake from STANDBY and even POWER_DOWN but every i2c slave I have written with DxCore and megaTinyCore has been flakey unless set for SLEEP_MODE_IDLE.
The code here: https://github.com/ObviousInRetrospect/DualMode/tree/main/DualModeExample
works as expected
but if SLEEP_MODE_IDLE is changed to SLEEP_MODE_STANDBY the slave starts corrupting data: https://github.com/ObviousInRetrospect/DualMode/blob/10dfca6b5bc6c8fedf1605d2d8c5981e2e4aca34/DualModeExample/DualModeExample.ino#L319
this is most easily seen (especially without an ina3221) by uncommenting the test pattern data fill (L184-188): https://github.com/ObviousInRetrospect/DualMode/blob/10dfca6b5bc6c8fedf1605d2d8c5981e2e4aca34/DualModeExample/DualModeExample.ino#L184
When I raised this in https://github.com/SpenceKonde/DxCore/discussions/316 @MX682X suggested opening a separate issue with more details.
The output on the master https://github.com/ObviousInRetrospect/DualMode/tree/main/DualModeExampleClient in SLEEP_MODE_IDLE is a long string of correct reads:
(the master does a 32-byte read follow by a 25-byte read. the last 4 bytes are a crc32 covering the entire data)
omitting thousands of similar lines with very few errors. In an overnight run ran this overnight, 99.2% of transfers were clean, 0.8% corruption due to race condition around crc calculation where data looks fine but the data changed during crc calculation.
when the slave is changed to SLEEP_MODE_STANDBY, the output changes to:
[content in square brackets are comments I added]
This is with test pattern data in which each byte contains its own address