Closed Christian-B closed 2 years ago
A simple test using IntroLab/learning/simple.py mode = Debug shows that even on a 4 chip board the preallocated_resources.core_resources has a length of 8
The PreAllocatedResourceContainer is created in 5 places. AbstractSpinnakerBase - empty PreAllocateForBitFieldRouterCompressor - sdram every chip
So accepting a minor over reserve no reason it can not be done just per chip, per ethernet
PreAllocateResourcesForLivePacketGatherers has two modes.
However the only (none test) usage of LivePacketGatherParameters is SpynnakerExternalDevicePluginManager.update_live_packet_gather_tracker
The only usage of that found is: SpynnakerExternalDevicePluginManager.activate_live_output_for
An None of calls to activate_live_output_for ever provide an board_address
Which raises the questions,
Do we want to keep this level of complexity in LivePacketGatherParameters and the algorithms
Do we have cases where there are multiple LivePacketGatherParameters active at once?
This idea could also be extended to have the vertices descibe their need rather than a pre step.
In our current model the ResourceTracker is given a list of Preallocated Resources.
This is so that when later things like ChipPowerMonitor, DataSpeedUp, LPG, will still fit.
Would it be possible to instead tell the resource tracker that it needs to hold X for every board/Ethernet chip and ethernet chip.
This could save time and memory especially on a virtual 1200 board machine.